Datasheet Texas Instruments CD74AC244 — 数据表

制造商Texas Instruments
系列CD74AC244
Datasheet Texas Instruments CD74AC244

具有三态输出的八路同相缓冲器/线路驱动器

数据表

CD54/74AC240/241/244, CD54/74ACT240/241/244 datasheet
PDF, 1.2 Mb, 修订版: B, 档案已发布: Jan 19, 2004
从文件中提取

价格

状态

CD74AC244ECD74AC244EE4CD74AC244MCD74AC244M96CD74AC244M96G4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNo

打包

CD74AC244ECD74AC244EE4CD74AC244MCD74AC244M96CD74AC244M96G4
N12345
Pin2020202020
Package TypeNNDWDWDW
Industry STD TermPDIPPDIPSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY20202520002000
CarrierTUBETUBETUBELARGE T&RLARGE T&R
Device MarkingCD74AC244ECD74AC244EAC244MAC244MAC244M
Width (mm)6.356.357.57.57.5
Length (mm)24.3324.3312.812.812.8
Thickness (mm)4.574.572.352.352.35
Pitch (mm)2.542.541.271.271.27
Max Height (mm)5.085.082.652.652.65
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参数化

Parameters / ModelsCD74AC244E
CD74AC244E
CD74AC244EE4
CD74AC244EE4
CD74AC244M
CD74AC244M
CD74AC244M96
CD74AC244M96
CD74AC244M96G4
CD74AC244M96G4
Bits88888
F @ Nom Voltage(Max), Mhz6060606060
ICC @ Nom Voltage(Max), mA0.160.160.160.160.16
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA-24/24-24/24-24/24-24/24-24/24
Package GroupPDIPPDIPSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Technology FamilyACACACACAC
VCC(Max), V5.55.55.55.55.5
VCC(Min), V1.51.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns82,9.2,6.582,9.2,6.582,9.2,6.582,9.2,6.582,9.2,6.5

生态计划

CD74AC244ECD74AC244EE4CD74AC244MCD74AC244M96CD74AC244M96G4
RoHSCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

应用须知

  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

模型线

制造商分类

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver