Datasheet Texas Instruments CD74AC164 — 数据表

制造商Texas Instruments
系列CD74AC164
Datasheet Texas Instruments CD74AC164

8位串行输入/并行输出移位寄存器

数据表

8-Bit Serial-In/Parallel-Out Shift Register datasheet
PDF, 714 Kb, 修订版: A, 档案已发布: May 17, 2000
从文件中提取

价格

状态

CD74AC164ECD74AC164EE4CD74AC164MCD74AC164M96CD74AC164ME4CD74AC164MG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNo

打包

CD74AC164ECD74AC164EE4CD74AC164MCD74AC164M96CD74AC164ME4CD74AC164MG4
N123456
Pin141414141414
Package TypeNNDDDD
Industry STD TermPDIPPDIPSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY25255025005050
CarrierTUBETUBETUBELARGE T&RTUBETUBE
Device MarkingCD74AC164ECD74AC164EAC164MAC164MAC164MAC164M
Width (mm)6.356.353.913.913.913.91
Length (mm)19.319.38.658.658.658.65
Thickness (mm)3.93.91.581.581.581.58
Pitch (mm)2.542.541.271.271.271.27
Max Height (mm)5.085.081.751.751.751.75
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参数化

Parameters / ModelsCD74AC164E
CD74AC164E
CD74AC164EE4
CD74AC164EE4
CD74AC164M
CD74AC164M
CD74AC164M96
CD74AC164M96
CD74AC164ME4
CD74AC164ME4
CD74AC164MG4
CD74AC164MG4
3-State OutputNoNoNoNoNoNo
F @ Nom Voltage(Max), Mhz100100100100100100
ICC @ Nom Voltage(Max), mA0.160.160.160.160.160.16
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-24
Package GroupPDIPPDIPSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Technology FamilyACACACACACAC
VCC(Max), V5.55.55.55.55.55.5
VCC(Min), V1.51.51.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns158,17.7,12.6158,17.7,12.6158,17.7,12.6158,17.7,12.6158,17.7,12.6158,17.7,12.6

生态计划

CD74AC164ECD74AC164EE4CD74AC164MCD74AC164M96CD74AC164ME4CD74AC164MG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

应用须知

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, 修订版: A, 档案已发布: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

模型线

制造商分类

  • Semiconductors> Logic> Flip-Flop/Latch/Register> Shift Register