Datasheet Texas Instruments CD54HC40103 — 数据表

制造商Texas Instruments
系列CD54HC40103
Datasheet Texas Instruments CD54HC40103

高速CMOS逻辑8级同步向下计数器

数据表

CD54HC40103, CD74HC40103, CD74HCT40103 datasheet
PDF, 460 Kb, 修订版: D, 档案已发布: Oct 16, 2003
从文件中提取

价格

状态

5962-9055301EA5HC40103F3AS228CD54HC40103FCD54HC40103F3A
Lifecycle StatusActive (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

打包

5962-9055301EA5HC40103F3AS228CD54HC40103FCD54HC40103F3A
N1234
Pin16161616
Package TypeJJJJ
Industry STD TermCDIPCDIPCDIPCDIP
JEDEC CodeR-GDIP-TR-GDIP-TR-GDIP-TR-GDIP-T
Package QTY111
CarrierTUBETUBETUBE
Width (mm)6.926.926.926.92
Length (mm)19.5619.5619.5619.56
Thickness (mm)4.574.574.574.57
Pitch (mm)2.542.542.542.54
Max Height (mm)5.085.085.085.08
Mechanical Data下载下载下载下载
Device MarkingCD54HC40103F5962-9055301EA

参数化

Parameters / Models5962-9055301EA
5962-9055301EA
5HC40103F3AS228
5HC40103F3AS228
CD54HC40103F
CD54HC40103F
CD54HC40103F3A
CD54HC40103F3A
Bits888
Bits(#)8
F @ Nom Voltage(Max), Mhz282828
F @ Nom Voltage(Max)(Mhz)28
FunctionCounterCounterCounterCounter
ICC @ Nom Voltage(Max), mA0.080.080.08
ICC @ Nom Voltage(Max)(mA)0.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125
Operating Temperature Range(C)-55 to 125
Output Drive (IOL/IOH)(Max), mA5.2/-5.25.2/-5.25.2/-5.2
Output Drive (IOL/IOH)(Max)(mA)5.2/-5.2
Package GroupCDIPCDIPCDIPCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)See datasheet (CDIP)See datasheet (CDIP)
Package Size: mm2:W x L (PKG)See datasheet (CDIP)
RatingMilitaryMilitaryMilitaryMilitary
Schmitt TriggerNoNoNo
Technology FamilyHCHCHCHC
TypeBinaryBinaryBinaryBinary
VCC(Max), V666
VCC(Max)(V)6
VCC(Min), V222
VCC(Min)(V)2
Voltage(Nom), V3.3,53.3,53.3,5
tpd @ Nom Voltage(Max), ns646464
tpd @ Nom Voltage(Max)(ns)64

生态计划

5962-9055301EA5HC40103F3AS228CD54HC40103FCD54HC40103F3A
RoHSSee ti.comNot CompliantSee ti.comSee ti.com
Pb FreeNo

应用须知

  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, 档案已发布: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, 档案已发布: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
  • Selecting the Right Texas Instruments Signal Switch
    PDF, 769 Kb, 档案已发布: Sep 7, 2001
    Texas Instruments offers a wide variety of electronic switches (digital analog bilateral bilateral analog) in a variety of families including CBT CBTLV HC LV and LVC. Depending on the application the right solution may be an analog switch that passes digital signals or vice versa. This application report summarizes the various switching technologies and provides considerations for choosi
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, 档案已发布: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • Live Insertion
    PDF, 150 Kb, 档案已发布: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, 修订版: C, 档案已发布: Dec 2, 2015
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, 档案已发布: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, 修订版: C, 档案已发布: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Introduction to Logic
    PDF, 93 Kb, 档案已发布: Apr 30, 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, 修订版: D, 档案已发布: Jun 23, 2016
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, 修订版: B, 档案已发布: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • Shelf-Life Evaluation of Lead-Free Component Finishes
    PDF, 1.3 Mb, 档案已发布: May 24, 2004
    The integrated circuit (IC) industry is converting to lead (Pb)-free termination finishes for leadframe-based packages. IC component users need to know the maximum length of time that components can be stored prior to being soldered. This study predicts shelf life of the primary Pb-free finishes being proposed by the industry. Components were exposed to a controlled environment, with known aging a

模型线

制造商分类

  • Semiconductors> Space & High Reliability> Logic Products> Specialty Logic Products> Counter/Arithmetic/Parity Function Products