Datasheet Texas Instruments AM5K2E02ABDA25 — 数据表

制造商Texas Instruments
系列AM5K2E02
零件号AM5K2E02ABDA25
Datasheet Texas Instruments AM5K2E02ABDA25

Sitara处理器:双ARM Cortex-A15 1089-FCBGA -40至100

数据表

AM5K2E04/02 Multicore ARM KeyStone II System-on-Chip (SoC) datasheet
PDF, 1.8 Mb, 修订版: D, 档案已发布: Mar 11, 2015
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin10891089
Package TypeABDABD
Package QTY11
CarrierJEDEC TRAY (5+1)JEDEC TRAY (5+1)
Device MarkingAM5K2E02ABDA1.25GHZ
Width (mm)2727
Length (mm)2727
Thickness (mm)2.982.98
Mechanical Data下载下载

参数化

ARM CPU2 ARM Cortex-A15
ARM MHz1250,1400 Max.
ApplicationsIndustrial
DRAMDDR3,DDR3L
EMAC8-Port 1Gb Switch
I2C3
On-Chip L2 Cache4096 KB (ARM Cluster)
Operating SystemsSYS/BIOS,Linux,VxWorks,Integrity
Operating Temperature Range0 to 85,-40 to 100 C
Other On-Chip Memory2048 KB
PCI/PCIe4 PCIe Gen2
RatingCatalog
SPI3
Serial I/OHyperlink,I2C,SPI,TSIP,UART,USB
UART2 SCI
USB2

生态计划

RoHSCompliant

设计套件和评估模块

  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
    XDS560v2 System Trace USB & Ethernet Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: XEVMK2EX
    K2E Development Board
    Lifecycle Status: Active (Recommended for new designs)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
    XDS560v2 System Trace USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • JTAG Emulators/ Analyzers: TMDSEMU200-U
    XDS200 USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: EVMK2EX
    K2E Development Board
    Lifecycle Status: Preview (Device has been announced but is not in production. Samples may or may not be available)

应用须知

  • Power Consumption Summary for K2E System-on-Chip (SoC) Device Family
    PDF, 65 Kb, 档案已发布: Jun 14, 2017
    This application report discusses estimating the power consumption of Texas Instruments' K2Ex Digital Signal Processors (DSP) using a provided device-specific power spreadsheet. It should be noted that the power model is applicable for all silicon revisions.
  • Clocking Spreadsheet for K2E Device Family
    PDF, 22 Kb, 档案已发布: Jan 26, 2017
    This document discusses the internal clocking architecture of Texas Instruments K2Ex Digital Signal Processors (DSP) using a provided clocking spreadsheet.The 66AK2Ex and AM5K2Ex devices have similar internal clocking architecture and peripherals except the corepac. The 66AK2Ex devices have both DSP corepac and ARM corepac, whereas, the AM5K2Ex devices have ARM corepac only.Use the K
  • Keystone II DDR3 Initialization
    PDF, 73 Kb, 档案已发布: Jan 26, 2015
    This application report provides a step-to-step initialization guide for the Keystone II device DDR3 SDRAM controller.
  • Throughput Performance Guide for KeyStone II Devices (Rev. B)
    PDF, 866 Kb, 修订版: B, 档案已发布: Dec 22, 2015
    This application report analyzes various performance measurements of the KeyStone II family of processors. It provides a throughput analysis of the various support peripherals to different end-points and memory access.
  • Keystone II DDR3 Debug Guide
    PDF, 143 Kb, 档案已发布: Oct 16, 2015
    This guide provides tools for use when debugging a failing DDR3 interface on a KeyStone II device.
  • Power Management of KS2 Device (Rev. C)
    PDF, 61 Kb, 修订版: C, 档案已发布: Jul 15, 2016
    This application report lists the steps to enable Class 0 Temperature Compensation (Class 0 TC) mode of SmartReflexв„ў Subsystem (SRSS) module available on such devices.
  • Hardware Design Guide for KeyStone II Devices
    PDF, 1.8 Mb, 档案已发布: Mar 24, 2014
  • PCIe Use Cases for KeyStone Devices
    PDF, 320 Kb, 档案已发布: Dec 13, 2011
  • The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
    PDF, 20 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
  • Clocking Design Guide for KeyStone Devices
    PDF, 1.5 Mb, 档案已发布: Nov 9, 2010
  • Optimizing Loops on the C66x DSP
    PDF, 585 Kb, 档案已发布: Nov 9, 2010
  • DDR3 Design Requirements for KeyStone Devices (Rev. B)
    PDF, 582 Kb, 修订版: B, 档案已发布: Jun 5, 2014
  • Multicore Programming Guide (Rev. B)
    PDF, 1.8 Mb, 修订版: B, 档案已发布: Aug 29, 2012
    As application complexity continues to grow, we have reached a limit on increasing performance by merely scaling clock speed. To meet the ever-increasing processing demand, modern System-On-Chip solutions contain multiple processing cores. The dilemma is how to map applications to multicore devices. In this paper, we present a programming methodology for converting applications to run on multicore

模型线

制造商分类

  • Semiconductors > Processors > Sitara Processors > ARM Cortex-A15 > AM5K2Ex