Datasheet Texas Instruments ADS8342 — 数据表

制造商Texas Instruments
系列ADS8342
Datasheet Texas Instruments ADS8342

16位250 kSPS ADC并行输出,4个真双极性通道

数据表

ADS8342: 16-Bit, 250kSPS, 4-Channel, Parallel Output Analog-to-Digital Converter datasheet
PDF, 1.5 Mb, 档案已发布: Feb 6, 2003
从文件中提取

价格

状态

ADS8342IBPFBTADS8342IPFBTADS8342IPFBTG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNo

打包

ADS8342IBPFBTADS8342IPFBTADS8342IPFBTG4
N123
Pin484848
Package TypePFBPFBPFB
Industry STD TermTQFPTQFPTQFP
JEDEC CodeS-PQFP-GS-PQFP-GS-PQFP-G
Package QTY250250250
CarrierSMALL T&RSMALL T&RSMALL T&R
Device MarkingBADS8342IADS8342I
Width (mm)777
Length (mm)777
Thickness (mm)111
Pitch (mm).5.5.5
Max Height (mm)1.21.21.2
Mechanical Data下载下载下载

参数化

Parameters / ModelsADS8342IBPFBT
ADS8342IBPFBT
ADS8342IPFBT
ADS8342IPFBT
ADS8342IPFBTG4
ADS8342IPFBTG4
# Input Channels444
Analog Voltage AVDD(Max), V5.255.255.25
Analog Voltage AVDD(Min), V-5.25-5.25-5.25
ArchitectureSARSARSAR
Digital Supply(Max), V5.55.55.5
Digital Supply(Min), V2.72.72.7
INL(Max), +/-LSB444
Input Range(Max), V2.52.52.5
Input Range(Min), V-2.5-2.5-2.5
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesN/AN/AN/A
InterfaceParallelParallelParallel
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Package GroupTQFPTQFPTQFP
Package Size: mm2:W x L, PKG48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)48TQFP: 81 mm2: 9 x 9(TQFP)
Power Consumption(Typ), mW208208208
RatingCatalogCatalogCatalog
Reference ModeExtExtExt
Resolution, Bits161616
SINAD, dB84.684.684.6
SNR, dB868686
Sample Rate (max), SPS250kSPS250kSPS250kSPS
Sample Rate(Max), MSPS0.250.250.25
THD(Typ), dB-89-89-89

生态计划

ADS8342IBPFBTADS8342IPFBTADS8342IPFBTG4
RoHSCompliantCompliantCompliant

应用须知

  • ADS8342 ADC SAR Inputs
    PDF, 223 Kb, 档案已发布: Jan 6, 2005
    Successive approximation register analog-to-digital converters (SAR ADCs) present a challenging load to the circuitry that drives the analog inputs. Specifications in data sheets may mislead the user into thinking that analog inputs, for example, are static, when in fact they create a highly dynamic load that requires specially designed buffer circuitry. This article looks at the architecture of
  • Controlling the ADS8342 with TMS320 Series DSP's
    PDF, 109 Kb, 档案已发布: Sep 22, 2003
    The ADS8342 16-bit, bipolar input, parallel output analog-to-digital converter has a number of features that allow for an easy interface to many of the TMS320? DSP family of digital signal processors from Texas Instruments. This application note focuses on configuring, sampling, and converting analog data presented to the ADS8342 ADC, with software examples using the TMS320C6711 and C5416 DSPs. Th
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

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制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)