Datasheet Texas Instruments ADS8320-HT — 数据表

制造商Texas Instruments
系列ADS8320-HT
Datasheet Texas Instruments ADS8320-HT

高温16位,2.7V至5V高速微功耗采样模数转换器。

数据表

16-Bit, High-Speed, 2.7V to 5V Micro Power Sampling Analog-to-Digital Converter. datasheet
PDF, 337 Kb, 修订版: B, 档案已发布: Sep 7, 2012
从文件中提取

价格

状态

ADS8320SHKJADS8320SHKQADS8320SKGD1ADS8320SKGD2
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

打包

ADS8320SHKJADS8320SHKQADS8320SKGD1ADS8320SKGD2
N1234
Pin88
Package TypeHKJHKQKGDKGD
Industry STD TermCFPCFP
JEDEC CodeR-CDFP-FR-CDFP-G
Package QTY1124010
CarrierTUBETUBEBULKTUBE
Device MarkingHKJADS8320S
Width (mm)5.655.65
Length (mm)6.96.9
Thickness (mm)1.652.65
Pitch (mm)1.271.27
Max Height (mm)1.652.8
Mechanical Data下载下载

参数化

Parameters / ModelsADS8320SHKJ
ADS8320SHKJ
ADS8320SHKQ
ADS8320SHKQ
ADS8320SKGD1
ADS8320SKGD1
ADS8320SKGD2
ADS8320SKGD2
# Input Channels1111
Analog Voltage AVDD(Max), V5.255.255.255.25
Analog Voltage AVDD(Min), V2.72.72.72.7
ArchitectureSARSARSARSAR
Digital Supply(Max), V5.255.255.255.25
Digital Supply(Min), V2.72.72.72.7
INL(Max), +/-LSB2.12.12.12.1
InterfaceSPISPISPISPI
Operating Temperature Range, C-55 to 210-55 to 210-55 to 210-55 to 210
Package GroupCFPCFPCFPCFP
Package Size: mm2:W x L, PKGSee datasheet (CFP)See datasheet (CFP)See datasheet (CFP)See datasheet (CFP)
Power Consumption(Typ), mW1.951.951.951.95
RatingCatalogCatalogCatalogCatalog
Reference ModeExtExtExtExt
Resolution, Bits16161616
SFDR, dB86868686
SNR, dB88888888
Sample Rate (max), SPS100kSPS100kSPS100kSPS100kSPS

生态计划

ADS8320SHKJADS8320SHKQADS8320SKGD1ADS8320SKGD2
RoHSSee ti.comSee ti.comSee ti.comSee ti.com

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters