Datasheet Texas Instruments ADS7828 — 数据表

制造商Texas Instruments
系列ADS7828
Datasheet Texas Instruments ADS7828

具有内部基准和I2C接口的12位,8通道SAR ADC

数据表

12-Bit, 8-Channel Sampling Analog-to-Digital Converter with I2C Interface datasheet
PDF, 870 Kb, 修订版: C, 档案已发布: Mar 30, 2005
从文件中提取

价格

状态

ADS7828E/250ADS7828E/250G4ADS7828E/2K5ADS7828E/2K5G4ADS7828EB/250ADS7828EB/250G4ADS7828EB/2K5ADS7828EB/2K5G4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesNoYesYesNoNoNoYes

打包

ADS7828E/250ADS7828E/250G4ADS7828E/2K5ADS7828E/2K5G4ADS7828EB/250ADS7828EB/250G4ADS7828EB/2K5ADS7828EB/2K5G4
N12345678
Pin1616161616161616
Package TypePWPWPWPWPWPWPWPW
Industry STD TermTSSOPTSSOPTSSOPTSSOPTSSOPTSSOPTSSOPTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2502502500250025025025002500
CarrierSMALL T&RSMALL T&RLARGE T&RLARGE T&RSMALL T&RSMALL T&RLARGE T&RLARGE T&R
Device Marking7828E7828EADS7828EADSADSBADS
Width (mm)4.44.44.44.44.44.44.44.4
Length (mm)55555555
Thickness (mm)11111111
Pitch (mm).65.65.65.65.65.65.65.65
Max Height (mm)1.21.21.21.21.21.21.21.2
Mechanical Data下载下载下载下载下载下载下载下载

参数化

Parameters / ModelsADS7828E/250
ADS7828E/250
ADS7828E/250G4
ADS7828E/250G4
ADS7828E/2K5
ADS7828E/2K5
ADS7828E/2K5G4
ADS7828E/2K5G4
ADS7828EB/250
ADS7828EB/250
ADS7828EB/250G4
ADS7828EB/250G4
ADS7828EB/2K5
ADS7828EB/2K5
ADS7828EB/2K5G4
ADS7828EB/2K5G4
# Input Channels88888888
Analog Voltage AVDD(Max), V5.255.255.255.255.255.255.255.25
Analog Voltage AVDD(Min), V2.72.72.72.72.72.72.72.7
ArchitectureSARSARSARSARSARSARSARSAR
Digital Supply(Max), V5.255.255.255.255.255.255.255.25
Digital Supply(Min), V2.72.72.72.72.72.72.72.7
INL(Max), +/-LSB11111111
Input Range(Max), V5.255.255.255.255.255.255.255.25
Input TypePseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-EndedPseudo-Differential,Single-Ended
Integrated FeaturesN/AN/AN/AN/AN/AN/AN/AN/A
InterfaceI2CI2CI2CI2CI2CI2CI2CI2C
Multi-Channel ConfigurationMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexedMultiplexed
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Package GroupTSSOPTSSOPTSSOPTSSOPTSSOPTSSOPTSSOPTSSOP
Package Size: mm2:W x L, PKG16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)16TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Power Consumption(Typ), mW0.6750.6750.6750.6750.6750.6750.6750.675
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Reference ModeExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,IntExt,Int
Resolution, Bits1212121212121212
SINAD, dB7171717171717171
SNR, dB7272727272727272
Sample Rate (max), SPS50kSPS50kSPS50kSPS50kSPS50kSPS50kSPS50kSPS50kSPS
Sample Rate(Max), MSPS0.050.050.050.050.050.050.050.05
THD(Typ), dB-82-82-82-82-82-82-82-82

生态计划

ADS7828E/250ADS7828E/250G4ADS7828E/2K5ADS7828E/2K5G4ADS7828EB/250ADS7828EB/250G4ADS7828EB/2K5ADS7828EB/2K5G4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

应用须知

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)