Datasheet Texas Instruments ADS7230 — 数据表

制造商	Texas Instruments
系列	ADS7230

数据表

价格

状态

打包

参数化

Parameters / Models	ADS7230IPW	ADS7230IPWG4	ADS7230IPWR	ADS7230IRSAR	ADS7230IRSAT
# Input Channels	2	2	2	2	2
Analog Voltage AVDD(Max), V	5.5	5.5	5.5	5.5	5.5
Analog Voltage AVDD(Min), V	2.7	2.7	2.7	2.7	2.7
Architecture	SAR	SAR	SAR	SAR	SAR
Digital Supply(Max), V	5.5	5.5	5.5	5.5	5.5
Digital Supply(Min), V	1.65	1.65	1.65	1.65	1.65
INL(Max), +/-LSB	0.5	0.5	0.5	0.5	0.5
Input Range(Max), V	5.5	5.5	5.5	5.5	5.5
Input Type	Pseudo-Differential,Single-Ended	Pseudo-Differential,Single-Ended	Pseudo-Differential,Single-Ended	Pseudo-Differential,Single-Ended	Pseudo-Differential,Single-Ended
Integrated Features	Daisy-Chainable,Oscillator	Daisy-Chainable,Oscillator	Daisy-Chainable,Oscillator	Daisy-Chainable,Oscillator	Daisy-Chainable,Oscillator
Interface	Serial	Serial	Serial	Serial	Serial
Multi-Channel Configuration	Multiplexed	Multiplexed	Multiplexed	Multiplexed	Multiplexed
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Package Group	TSSOP	TSSOP	TSSOP	QFN	QFN
Package Size: mm2:W x L, PKG	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)	16TSSOP: 32 mm2: 6.4 x 5(TSSOP)	16QFN: 16 mm2: 4 x 4(QFN)	16QFN: 16 mm2: 4 x 4(QFN)
Power Consumption(Typ), mW	13.7	13.7	13.7	13.7	13.7
Rating	Catalog	Catalog	Catalog	Catalog	Catalog
Reference Mode	Ext	Ext	Ext	Ext	Ext
Resolution, Bits	12	12	12	12	12
SINAD, dB	73.7	73.7	73.7	73.7	73.7
SNR, dB	73.9	73.9	73.9	73.9	73.9
Sample Rate (max), SPS	1MSPS	1MSPS	1MSPS	1MSPS	1MSPS
Sample Rate(Max), MSPS	1	1	1	1	1
THD(Typ), dB	-88.5	-88.5	-88.5	-88.5	-88.5

生态计划

应用须知

• 下载
  Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
  PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
  This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
• 下载
  Determining Minimum Acquisition Times for SAR ADCs, part 2
  PDF, 215 Kb, 档案已发布: Mar 17, 2011
  The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
• 下载
  Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
  PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
• 下载
  A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
  PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
  This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
• 下载
  Principles of Data Acquisition and Conversion (Rev. A)
  PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)