Datasheet Texas Instruments ADS58C23 — 数据表
| 制造商 | Texas Instruments | 
| 系列 | ADS58C23 | 

具有多信号3G + LTE信号处理功能的双通道IF BTS接收器
数据表
状态
| ADS58C23IPFP | ADS58C23IPFPR | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | 
| Manufacture's Sample Availability | No | No | 
打包
| ADS58C23IPFP | ADS58C23IPFPR | |
|---|---|---|
| N | 1 | 2 | 
| Pin | 80 | 80 | 
| Package Type | PFP | PFP | 
| Industry STD Term | HTQFP | HTQFP | 
| JEDEC Code | S-PQFP-G | S-PQFP-G | 
| Package QTY | 96 | 1000 | 
| Carrier | JEDEC TRAY (10+1) | LARGE T&R | 
| Device Marking | ADS58C23I | ADS58C23I | 
| Width (mm) | 12 | 12 | 
| Length (mm) | 12 | 12 | 
| Thickness (mm) | 1 | 1 | 
| Pitch (mm) | .5 | .5 | 
| Max Height (mm) | 1.2 | 1.2 | 
| Mechanical Data | 下载 | 下载 | 
参数化
| Parameters / Models | ADS58C23IPFP![]()  | ADS58C23IPFPR![]()  | 
|---|---|---|
| # Input Channels | 2 | 2 | 
| Analog Input BW, MHz | 750 | 750 | 
| Analog Voltage AVDD(Max), V | 3.45 | 3.45 | 
| Analog Voltage AVDD(Min), V | 3.15 | 3.15 | 
| Interface | Parallel LVDS | Parallel LVDS | 
| Logic Voltage DV/DD(Max), V | 2.0 | 2.0 | 
| Logic Voltage DV/DD(Min), V | 1.7 | 1.7 | 
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | 
| Package Group | HTQFP | HTQFP | 
| Package Size: mm2:W x L, PKG | 80HTQFP: 196 mm2: 14 x 14(HTQFP) | 80HTQFP: 196 mm2: 14 x 14(HTQFP) | 
| Power Consumption(Typ), mW | 1630 | 1630 | 
| Resolution, Bits | 14 | 14 | 
| SFDR(Typ), dB | 94 | 94 | 
| SNR(Typ), dB | 75 | 75 | 
| Sample Rate(Max), MSPS | 250 | 250 | 
| Special Features | Decimating Filter,Differential Inputs,Nap Mode,Out of Range Indicator,Power Down | Decimating Filter,Differential Inputs,Nap Mode,Out of Range Indicator,Power Down | 
生态计划
| ADS58C23IPFP | ADS58C23IPFPR | |
|---|---|---|
| RoHS | Compliant | Compliant | 
应用须知
- High-Speed Analog-to-Digital Converter BasicsPDF, 1.1 Mb, 档案已发布: Jan 11, 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil - Band-Pass Filter Design Techniques for High-Speed ADCsPDF, 733 Kb, 档案已发布: Feb 27, 2012
Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
 - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
 
模型线
系列: ADS58C23 (2)
制造商分类
- Semiconductors> RF & Microwave> Wideband Receivers