Datasheet Texas Instruments ADS5263 — 数据表
| 制造商 | Texas Instruments |
| 系列 | ADS5263 |

四通道,16位,100MSPS模数转换器(ADC)
数据表
ADS5263 Quad Channel 16-Bit, 100-MSPS High-SNR ADC datasheet
PDF, 2.7 Mb, 修订版: D, 档案已发布: Nov 30, 2015
从文件中提取
状态
| ADS5263IRGCR | ADS5263IRGCR-NM | ADS5263IRGCT | ADS5263IRGCT-NM | |
|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No |
打包
| ADS5263IRGCR | ADS5263IRGCR-NM | ADS5263IRGCT | ADS5263IRGCT-NM | |
|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 |
| Pin | 64 | 64 | 64 | 64 |
| Package Type | RGC | RGC | RGC | RGC |
| Industry STD Term | VQFN | VQFN | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PQFP-N |
| Package QTY | 2000 | 2000 | 250 | 250 |
| Carrier | LARGE T&R | LARGE T&R | SMALL T&R | SMALL T&R |
| Device Marking | ADS5263 | ADS5263NM | ADS5263 | ADS5263NM |
| Width (mm) | 9 | 9 | 9 | 9 |
| Length (mm) | 9 | 9 | 9 | 9 |
| Thickness (mm) | .88 | .88 | .88 | .88 |
| Pitch (mm) | .5 | .5 | .5 | .5 |
| Max Height (mm) | 1 | 1 | 1 | 1 |
| Mechanical Data | 下载 | 下载 | 下载 | 下载 |
参数化
| Parameters / Models | ADS5263IRGCR![]() | ADS5263IRGCR-NM![]() | ADS5263IRGCT![]() | ADS5263IRGCT-NM![]() |
|---|---|---|---|---|
| # Input Channels | 4 | 4 | 4 | 4 |
| Analog Input BW, MHz | 70 | 70 | 70 | 70 |
| Architecture | Pipeline | Pipeline | Pipeline | Pipeline |
| DNL(Max), +/-LSB | 0.1 | 0.1 | 0.1 | 0.1 |
| DNL(Typ), +/-LSB | 0.1 | 0.1 | 0.1 | 0.1 |
| ENOB, Bits | 12.7 | 12.7 | 12.7 | 12.7 |
| INL(Max), +/-LSB | 12 | 12 | 12 | 12 |
| INL(Typ), +/-LSB | 5 | 5 | 5 | 5 |
| Input Buffer | No | No | No | No |
| Input Range, Vp-p | 4 | 4 | 4 | 4 |
| Interface | Parallel LVDS | Parallel LVDS | Parallel LVDS | Parallel LVDS |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Package Group | VQFN | VQFN | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 64VQFN: 81 mm2: 9 x 9(VQFN) | 64VQFN: 81 mm2: 9 x 9(VQFN) | 64VQFN: 81 mm2: 9 x 9(VQFN) | 64VQFN: 81 mm2: 9 x 9(VQFN) |
| Power Consumption(Typ), mW | 1350 | 1350 | 1350 | 1350 |
| Rating | Catalog | Catalog | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
| Resolution, Bits | 14,16,18 | 14,16,18 | 14,16,18 | 14,16,18 |
| SFDR, dB | 80 | 80 | 80 | 80 |
| SINAD, dB | 77.5 | 77.5 | 77.5 | 77.5 |
| SNR, dB | 84.6 | 84.6 | 84.6 | 84.6 |
| Sample Rate(Max), MSPS | 100 | 100 | 100 | 100 |
生态计划
| ADS5263IRGCR | ADS5263IRGCR-NM | ADS5263IRGCT | ADS5263IRGCT-NM | |
|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant |
应用须知
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
- Understanding Serial LVDS Capture in High-Speed ADCsPDF, 1.6 Mb, 档案已发布: Jul 10, 2013
This application note describes various schemes of interfacing serialized low-voltage differential signaling (LVDS) data outputs from high-speed analog-to-digital converters (ADCs) to a field-programmable gate arrays (FPGAs) or other application-specific integrated circuit (ASIC)-based receivers. This note provides an introduction to standard one-wire interfaces and other interface variants (such - A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, 修订版: A, 档案已发布: Jul 19, 2013
- CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, 档案已发布: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, 修订版: A, 档案已发布: May 22, 2015
- Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
模型线
系列: ADS5263 (4)
制造商分类
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)