Datasheet Texas Instruments 74ACT11286 — 数据表

制造商Texas Instruments
系列74ACT11286
Datasheet Texas Instruments 74ACT11286

具有总线驱动器奇偶校验I / O端口的9位奇偶校验发生器/检查器

数据表

9-Bit Parity Generator/Checker With Bus Driver Parity I/O Ports datasheet
PDF, 194 Kb, 修订版: B, 档案已发布: Apr 1, 1996
从文件中提取

价格

状态

74ACT11286D
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

74ACT11286D
N1
Pin14
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY50
CarrierTUBE
Device MarkingACT11286
Width (mm)3.91
Length (mm)8.65
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical Data下载

参数化

Parameters / Models74ACT11286D
74ACT11286D
Bits9
F @ Nom Voltage(Max), Mhz90
FunctionParity
ICC @ Nom Voltage(Max), mA0.08
Operating Temperature Range, C-40 to 85
Output Drive (IOL/IOH)(Max), mA24/-24
Package GroupSOIC
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)
RatingCatalog
Technology FamilyACT
TypeOther
VCC(Max), V5.5
VCC(Min), V4.5
Voltage(Nom), V5
tpd @ Nom Voltage(Max), ns12

生态计划

74ACT11286D
RoHSCompliant

应用须知

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    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
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  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
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    PDF, 337 Kb, 档案已发布: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
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    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
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    PDF, 89 Kb, 修订版: B, 档案已发布: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, 修订版: C, 档案已发布: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
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    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

模型线

系列: 74ACT11286 (1)

制造商分类

  • Semiconductors> Logic> Specialty Logic> Counter/Arithmetic/Parity Function