Datasheet Texas Instruments ADS8319IBDGSR — 数据表

制造商	Texas Instruments
系列	ADS8319
零件号	ADS8319IBDGSR

MSOP-10 10-VSSOP -40至85中带有SPI接口的精密16位SAR

数据表

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PDF, 2.3 Mb, 修订版: C, 档案已发布: Dec 9, 2016

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价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

打包

Pin	10
Package Type	DGS
Industry STD Term	VSSOP
JEDEC Code	S-PDSO-G
Package QTY	2500
Carrier	LARGE T&R
Device Marking	CEN
Width (mm)	3
Length (mm)	3
Thickness (mm)	1.02
Pitch (mm)	.5
Max Height (mm)	1.07
Mechanical Data	下载

参数化

# Input Channels	1
Analog Voltage AVDD(Max)	5.5 V
Analog Voltage AVDD(Min)	4.5 V
Architecture	SAR
Digital Supply(Max)	5.5 V
Digital Supply(Min)	2.375 V
INL(Max)	1.5 +/-LSB
Input Range(Max)	5.5 V
Input Type	Pseudo-Differential,Single-Ended
Integrated Features	Daisy-Chainable
Interface	SPI
Multi-Channel Configuration	N/A
Operating Temperature Range	-40 to 85 C
Package Group	VSSOP
Package Size: mm2:W x L	10VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG
Power Consumption(Typ)	18 mW
Rating	Catalog
Reference Mode	Ext
Resolution	16 Bits
SINAD	93.8 dB
SNR	93.9 dB
Sample Rate (max)	500kSPS SPS
Sample Rate(Max)	0.5 MSPS
THD(Typ)	-111 dB

生态计划

RoHS

Compliant

应用须知

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The IBIS model, Part 2: Determining the total quality of an IBIS model
PDF, 221 Kb, 档案已发布: Mar 14, 2011
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Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319
PDF, 1.5 Mb, 档案已发布: Jun 24, 2009
The one size fits all approach to operational amplifiers is not effective. Every application has its own specific requirements that must be fulfilled. Appropriate selection of the op amp that drives an analog-to-digital converter (ADC) in a low-power application is a critical step. Most available low-power op amps trade off low-power features with other parameters such as bandwidth, settling t
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Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
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Determining Minimum Acquisition Times for SAR ADCs, part 2
PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
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Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
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A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
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Principles of Data Acquisition and Conversion (Rev. A)
PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

系列: ADS8319 (7)

ADS8319IBDGSR ADS8319IBDGST ADS8319IBDRCR ADS8319IBDRCT ADS8319IDGSR ADS8319IDGST ADS8319IDRCT

制造商分类

Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)