Datasheet Texas Instruments TLV1549CDR — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV1549 |
| 零件号 | TLV1549CDR |
10位38 kSPS ADC系列输出，固有S＆H功能，端子兼容。带TLC1549，TLC1549x 8-SOIC
数据表
10-Bit Analog-to-Digital Converters With Serial Control datasheet
PDF, 810 Kb, 修订版: C, 档案已发布: Mar 1, 1995
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价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
打包
| Pin | 8 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | V1549C |
| Width (mm) | 3.91 |
| Length (mm) | 4.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 1 |
| Analog Voltage AVDD(Max) | 3.6 V |
| Analog Voltage AVDD(Min) | 3 V |
| Architecture | SAR |
| Digital Supply(Max) | 3.6 V |
| Digital Supply(Min) | 3 V |
| INL(Max) | 1 +/-LSB |
| Input Range(Max) | 3.6 V |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | SPI |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG |
| Power Consumption(Typ) | 1.32 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 10 Bits |
| Sample Rate (max) | 38kSPS SPS |
| Sample Rate(Max) | 0.038 MSPS |
生态计划
| RoHS | Compliant |
应用须知
- Interfacing the TLV1549 10-Bit Serial-Out ADC to Popular 3.3-V MicrocontrollersPDF, 90 Kb, 档案已发布: Jan 1, 1994
The TLV1549, 10-bit serial-out A/ D converter operates with a 3.3-V (+/- 0.3 V) single supply. The device uses a switched-capacitor successive approximation method to perform the A/D conversion in a maximum of 21 ?s. This document describes interfacing the TLV1549 to three microcontrollors, 68HC05, TMS70C02, and 80C51-L, which operate from a single 3.3-V supply rail. Each interface requires no glu - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: TLV1549 (8)
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)