Datasheet Texas Instruments TLV2542CDGK — 数据表

制造商Texas Instruments
系列TLV2542
零件号TLV2542CDGK
Datasheet Texas Instruments TLV2542CDGK

12位,200 kSPS ADC,串行输出,与TMS320兼容(最高10MHz),双通道自动扫描8-VSSOP 0至70

数据表

2.7 V to 5.5 V Low-Power 12-Bit 140/200 KSPS, Serial Analog-To-Digital Converter datasheet
PDF, 1.2 Mb, 修订版: E, 档案已发布: Apr 12, 2010
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin8
Package TypeDGK
Industry STD TermVSSOP
JEDEC CodeR-PDSO-G
Package QTY80
CarrierTUBE
Device MarkingAHB
Width (mm)3
Length (mm)3
Thickness (mm).97
Pitch (mm).65
Max Height (mm)1.07
Mechanical Data下载

参数化

# Input Channels2
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input TypeSingle-Ended
Integrated FeaturesOscillator
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range-40 to 85,0 to 70 C
Package GroupVSSOP
Package Size: mm2:W x L8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG
Power Consumption(Typ)2.8 mW
RatingCatalog
Reference ModeExt
Resolution12 Bits
SINAD72 dB
SNR72 dB
Sample Rate (max)200kSPS SPS
Sample Rate(Max)0.2 MSPS
THD(Typ)-84 dB

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: 5-6KINTERFACE
    5-6K Interface Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Interfacing the TLC2552 and TLV2542 to the MSP430F149
    PDF, 123 Kb, 档案已发布: Feb 10, 2003
    This application note discusses the features of the TLC2552 and TLV2542 ADC. An SPI interface code example for the MSP430F149 to the TLC2552 ADC, and for the MSP430F149 to the TLV2542 ADC, are also presented.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)