Datasheet Texas Instruments DAC5687MPZPEP — 数据表

制造商Texas Instruments
系列DAC5687-EP
零件号DAC5687MPZPEP
Datasheet Texas Instruments DAC5687MPZPEP

增强型产品,双通道,16位,500MSPS,1x-8x内插数模转换器100-HTQFP -55至125

数据表

16-Bit 500 MSPS 2x-8x Interpolating Dual-Channel DAC datasheet
PDF, 2.2 Mb, 档案已发布: Jun 1, 2006
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin100
Package TypePZP
Industry STD TermHTQFP
JEDEC CodeS-PQFP-G
Package QTY90
CarrierJEDEC TRAY (10+1)
Device MarkingDAC5687MPZPEP
Width (mm)14
Length (mm)14
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

参数化

ArchitectureCurrent Sink
DAC Channels2
DNL(Max)3 +/-LSB
INL(Max)6 +/-LSB
InterfaceParallel CMOS
Operating Temperature Range-55 to 125 C
Output Range Max.20 mA
Output Range Min.2 mA
Output TypeCurrent
Package GroupHTQFP
Package Size: mm2:W x L100HTQFP: 256 mm2: 16 x 16(HTQFP) PKG
Power Consumption(Typ)1410 mW
RatingHiRel Enhanced Product
Reference: TypeInt
Resolution16 Bits
SFDR80 dB
SNR75 dB
Sample / Update Rate500 MSPS
Settling Time0.012 µs

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: TSW2200EVM
    TSW2200 Low-Cost Portable Power Supply Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • High Speed Digital-to-Analog Converters Basics (Rev. A)
    PDF, 829 Kb, 修订版: A, 档案已发布: Oct 23, 2012
  • Phase Noise Performance and Jitter Cleaning Ability of CDCE72010
    PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
    This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig
  • CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters
    PDF, 424 Kb, 档案已发布: Jun 8, 2008
    Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers

模型线

系列: DAC5687-EP (2)

制造商分类

  • Semiconductors > Space & High Reliability > Data Converter > Digital to Analog Converters