Datasheet Texas Instruments SN74LVT162245DLR — 数据表

制造商Texas Instruments
系列SN74LVT162245
零件号SN74LVT162245DLR
Datasheet Texas Instruments SN74LVT162245DLR

具有三态输出的3.3V ABT 16位总线收发器48-SSOP -40至85

数据表

Datasheet
TSP

价格

状态

Lifecycle StatusNRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin48
Package TypeDL
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY1000
CarrierLARGE T&R
Device MarkingLVT162245
Width (mm)7.49
Length (mm)15.88
Thickness (mm)2.59
Pitch (mm).635
Max Height (mm)2.79
Mechanical Data下载

替代品

ReplacementSN74LVTH162245DLR
Replacement CodeQ

参数化

Bits(#)8
F @ Nom Voltage(Max)(Mhz)160
ICC @ Nom Voltage(Max)(mA)0.08
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max)(mA)-32/64
Package GroupTSSOP
Package Size: mm2:W x L (PKG)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)(V)3.6
VCC(Min)(V)2.7
Voltage(Nom)(V)3.3
tpd @ Nom Voltage(Max)(ns)28

生态计划

RoHSNot Compliant
Pb FreeNo

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

模型线

制造商分类

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Standard Transceiver