Datasheet Texas Instruments SN74LVT16952DGGR — 数据表

制造商Texas Instruments
系列SN74LVT16952
零件号SN74LVT16952DGGR
Datasheet Texas Instruments SN74LVT16952DGGR

具有三态输出的3.3V ABT 16位寄存器收发器56-TSSOP -40至85

数据表

3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs datasheet
PDF, 1.5 Mb, 修订版: D, 档案已发布: Aug 1, 1996
从文件中提取

价格

状态

Lifecycle StatusNRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin56
Package TypeDGG
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingLVT16952
Width (mm)6.1
Length (mm)14
Thickness (mm)1.15
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

替代品

ReplacementSN74LVTH16952DGGR
Replacement CodeQ

生态计划

RoHSCompliant

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

模型线

制造商分类

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Registered Transceiver