Datasheet Texas Instruments SN74ALVC164245DGGT — 数据表

制造商	Texas Instruments
系列	SN74ALVC164245
零件号	SN74ALVC164245DGGT

具有三态输出的16位2.5V至3.3V / 3.3V至5V电平转换收发器48-TSSOP -40至85

数据表

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PDF, 1.1 Mb, 修订版: Q, 档案已发布: Sep 27, 2016

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价格

状态

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

打包

Pin	48
Package Type	DGG
Industry STD Term	TSSOP
JEDEC Code	R-PDSO-G
Package QTY	250
Carrier	SMALL T&R
Device Marking	ALVC164245
Width (mm)	6.1
Length (mm)	12.5
Thickness (mm)	1.15
Pitch (mm)	.5
Max Height (mm)	1.2
Mechanical Data	下载

参数化

Bits	16
ICCA Static Current	0.04 mA
ICCB Static Current	0.04 mA
Package Group	TSSOP
Package Size: mm2:W x L	48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP) PKG
Rating	Catalog
Special Features	N/A
Static Current	0.04 mA
VCCA(Max)	3.3 V
VCCA(Min)	2.5 V
VCCB(Max)	5 V
VCCB(Min)	3.3 V

生态计划

RoHS

Compliant

应用须知

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TI SN74ALVC16835 Component Specification Analysis for PC100
PDF, 43 Kb, 档案已发布: Aug 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
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Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
PDF, 96 Kb, 修订版: A, 档案已发布: May 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
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16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
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Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
PDF, 154 Kb, 修订版: A, 档案已发布: Sep 8, 1999
In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families
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Understanding Advanced Bus-Interface Products Design Guide
PDF, 253 Kb, 档案已发布: May 1, 1996

模型线

系列: SN74ALVC164245 (15)

74ALVC164245DGGRE4 74ALVC164245DGGRG4 74ALVC164245DGGTE4 74ALVC164245DGGTG4 74ALVC164245DLG4 74ALVC164245DLRG4 74ALVC164245GRDR 74ALVC164245ZQLR 74ALVC164245ZRDR SN74ALVC164245-W SN74ALVC164245DGGR SN74ALVC164245DGGT SN74ALVC164245DL SN74ALVC164245DLR SN74ALVC164245KR

制造商分类

Semiconductors > Logic > Voltage Level Translation > Application Specific Voltage Translation