Datasheet Texas Instruments SN74LVTH125IPWREP — 数据表

制造商Texas Instruments
系列SN74LVTH125-EP
零件号SN74LVTH125IPWREP
Datasheet Texas Instruments SN74LVTH125IPWREP

具有三态输出的增强型产品3.3V Abt四路总线缓冲器14-TSSOP -40至85

数据表

SN74LVTH125-EP datasheet
PDF, 646 Kb, 档案已发布: Nov 7, 2003
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin14
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingLH125EP
Width (mm)4.4
Length (mm)5
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical Data下载

参数化

Bits4
Input TypeTTL
Operating Temperature Range-40 to 85 C
Output TypeCMOS
Package GroupTSSOP
Package Size: mm2:W x L14TSSOP: 32 mm2: 6.4 x 5(TSSOP) PKG
RatingHiRel Enhanced Product
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
Voltage(Nom)3.3 V

生态计划

RoHSCompliant

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

模型线

系列: SN74LVTH125-EP (2)

制造商分类

  • Semiconductors > Space & High Reliability > Logic Products > Buffers/Drivers/Transceivers > Buffer Drivers