Datasheet Texas Instruments CD74HCT112EE4 — 数据表

[ /Title
(CD74
HC112
,
CD74
HCT11
2)
/Subject
(Dual
J-K
FlipFlop
with
Set and
Reset
Nega-CD54HC112, CD74HC112,
CD54HCT112, CD74HCT112
Data sheet acquired from Harris Semiconductor
SCHS141H Dual J-K Flip-Flop with Set and Reset
Negative-Edge Trigger March 1998 -Revised October 2003 Features Description Hysteresis on Clock Inputs for Improved Noise
Immunity and Increased Input Rise and Fall Times The ’HC112 and ’HCT112 utilize silicon-gate CMOS
technology to achieve operating speeds equivalent to LSTTL
parts. They exhibit the low power consumption of standard
CMOS integrated circuits, together with the ability to drive 10 …