Datasheet Texas Instruments DAC3282IRGZR — 数据表
制造商 | Texas Instruments |
系列 | DAC3282 |
零件号 | DAC3282IRGZR |
双通道,16位,625MSPS,1x-2x内插数模转换器(DAC)48-VQFN -40至85
数据表
DAC3282 16-Bit, 625 MSPS, 2x Interpolating, Dual-Channel Digital-to-Analog Converter (DAC) datasheet
PDF, 2.1 Mb, 修订版: C, 档案已发布: Mar 31, 2015
从文件中提取
价格
状态
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
打包
Pin | 48 |
Package Type | RGZ |
Industry STD Term | VQFN |
JEDEC Code | S-PQFP-N |
Package QTY | 2500 |
Carrier | LARGE T&R |
Device Marking | DAC3282I |
Width (mm) | 7 |
Length (mm) | 7 |
Thickness (mm) | .9 |
Pitch (mm) | .5 |
Max Height (mm) | 1 |
Mechanical Data | 下载 |
参数化
Architecture | Current Sink |
DAC Channels | 2 |
Interface | Parallel LVDS |
Interpolation | 1x,2x |
Operating Temperature Range | -40 to 85 C |
Package Group | VQFN |
Package Size: mm2:W x L | 48VQFN: 49 mm2: 7 x 7(VQFN) PKG |
Power Consumption(Typ) | 950 mW |
Rating | Catalog |
Resolution | 16 Bits |
SFDR | 83 dB |
Sample / Update Rate | 625 MSPS |
生态计划
RoHS | Compliant |
设计套件和评估模块
- Evaluation Modules & Boards: DAC3282EVM
DAC3282 Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TSW1406EVM
Pattern Generator: Data Converter EVMs With 8 LVDS Lanes up to 1.0Gbps
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: FMC-DAC-ADAPTER
High Speed DAC to FMC (Xilinx) Header Adapter Card
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
应用须知
- Design of Differential Filters for High-Speed Signal Chains (Rev. B)PDF, 166 Kb, 修订版: B, 档案已发布: Apr 30, 2010
Differential filters have many desirable attributes. The task of designing differential filters can seem daunting at first. Single-ended filters designed in any filter design package can be converted to a differential implementation. This application report explores simple conversion techniques for low-pass, high-pass, and band-pass LC filters. - DAC348x Device Configuration and SynchronizationPDF, 317 Kb, 档案已发布: Feb 18, 2013
- Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACsPDF, 319 Kb, 档案已发布: Jul 14, 2009
- Interfacing op amps to high-speed DACs, Part 2: Current-sourcing DACsPDF, 617 Kb, 档案已发布: Oct 4, 2009
- Passive Terminations for Current Output DACsPDF, 244 Kb, 档案已发布: Nov 10, 2008
The correct implementation of the high-speed DAC output termination is critical to achieving the best possible performance. The typical application involves choosing the correct network to create the necessary dc bias levels and correct effective impedance load to keep the output voltage within the compliance levels. This ensures that the maximum output signal amplitude and optimum ac performance - Q3 2009 Issue Analog Applications JournalPDF, 2.1 Mb, 档案已发布: Jul 14, 2009
- Q4 2009 Issue Analog Applications JournalPDF, 1.5 Mb, 档案已发布: Oct 4, 2009
- Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Kb, 档案已发布: Apr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, 档案已发布: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
模型线
系列: DAC3282 (2)
- DAC3282IRGZR DAC3282IRGZT
制造商分类
- Semiconductors > Data Converters > Digital-to-Analog Converters (DACs) > High Speed DACs (>10MSPS)