Datasheet Texas Instruments ADS8201IBRGER — 数据表

制造商Texas Instruments
系列ADS8201
零件号ADS8201IBRGER
Datasheet Texas Instruments ADS8201IBRGER

具有PGA和SPI的2.2V至5.5V,低功耗,12位,100kSPS,8通道DAS-24VQFN -40至85

数据表

2.2V to 5.5V, Low-Power, 12-Bit, 100kSPS, 8-Ch Data Acq System with PGA and SPI datasheet
PDF, 771 Kb, 修订版: B, 档案已发布: May 10, 2010
从文件中提取

价格

状态

Lifecycle StatusPreview (Device has been announced but is not in production. Samples may or may not be available)
Manufacture's Sample AvailabilityNo

打包

Pin24
Package TypeRGE
Industry STD TermVQFN
JEDEC CodeS-PQFP-N
Width (mm)4
Length (mm)4
Thickness (mm).88
Pitch (mm).5
Max Height (mm)1
Mechanical Data下载

参数化

# Input Channels8
Analog Voltage AVDD(Max)(V)5.5
Analog Voltage AVDD(Min)(V)2.2
Approx. Price (US$)2.75 | 1ku
ArchitectureSAR
Digital Supply(Max)(V)5.5
Digital Supply(Min)(V)2.2
INL(Max)(+/-LSB)1.5
Input Range(Max)(V)5.5
Input TypeDifferential
Single-Ended
Integrated FeaturesOscillator
PGA
InterfaceSPI
Multi-Channel ConfigurationMultiplexed
Operating Temperature Range(C)-40 to 85
Package GroupVQFN
Package Size: mm2:W x L (PKG)24VQFN: 16 mm2: 4 x 4(VQFN)
Power Consumption(Typ)(mW)1.32
RatingCatalog
Reference ModeExt
Resolution(Bits)12
SINAD(dB)N/A
Sample Rate (max)(SPS)100kSPS
THD(Typ)(dB)N/A

生态计划

RoHSNot Compliant
Pb FreeNo

应用须知

  • Obtaining 17 Bits of Resolution using a 12-Bit A/D System on a Chip
    PDF, 337 Kb, 档案已发布: Jun 24, 2010
    Integrated data acquisition systems can provide many benefits over discrete component designs. Superior performance, power, and cost savings, along with shorter development times, are among these benefits. Features such as integrated programmable gain amplifiers and averaging can provide added resolution. This application note includes information on how to achieve 17 bits of effective resolution
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)