Datasheet Texas Instruments CDCE72010RGCR — 数据表
| 制造商 | Texas Instruments |
| 系列 | CDCE72010 |
| 零件号 | CDCE72010RGCR |
10个输出低抖动时钟同步器和抖动消除器64-VQFN -40至85
数据表
Ten Output High Performance Clock Synchronizer, Jitter Cleaner &Clock Distrib datasheet
PDF, 1.8 Mb, 修订版: C, 档案已发布: Jan 31, 2012
从文件中提取
应用须知
- Using the CDCE72010 as a Frequency SynthesizerPDF, 1.1 Mb, 档案已发布: May 31, 2008
This application report is a general guide for using the CDCE72010 as a frequency synthesizer. This document explains the methods to work with the phase-locked loop (PLL) of the CDCE72010 to achieve multiple outputfrequencies from any input frequency. It also describes the basic functionality and methods for using the device efficiently. Furthermore, it describes the clock terminationmethod, d - Clock jitter analyzed in the time domain, Part 2PDF, 588 Kb, 档案已发布: Nov 15, 2010
- Impact of sampling-clock spurs on ADC performancePDF, 1.2 Mb, 档案已发布: Jul 14, 2009
- Clock jitter analyzed in the time domain, Part 3PDF, 627 Kb, 档案已发布: Sep 16, 2011
- 4Q 2010 Issue Analog Applications JournalPDF, 1.3 Mb, 档案已发布: Nov 15, 2010
- Журнал РїРѕ применению аналоговых компонентов 3Q 2011PDF, 3.9 Mb, 档案已发布: Sep 1, 2011
- 3Q 2011 Issue Analog Applications JournalPDF, 1.4 Mb, 档案已发布: Sep 16, 2011
- Q3 2009 Issue Analog Applications JournalPDF, 2.1 Mb, 档案已发布: Jul 14, 2009
- Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, 档案已发布: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, 档案已发布: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers
模型线
系列: CDCE72010 (4)
- CDCE72010RGCR CDCE72010RGCRG4 CDCE72010RGCT CDCE72010RGCTG4
制造商分类
- Semiconductors > Clock and Timing > Clock Jitter Cleaners > Single-Loop PLL