Datasheet Texas Instruments ADC10D1000CCMLS — 数据表

制造商Texas Instruments
系列ADC10D1000QML-SP
零件号ADC10D1000CCMLS
Datasheet Texas Instruments ADC10D1000CCMLS

数据表

ADC10D1000QML Low-Power, 10-Bit, Dual 1-GSPS or Single 2-GSPS Analog-to-Digital Converter datasheet
PDF, 1.3 Mb, 修订版: G, 档案已发布: Dec 7, 2016
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin376
Package TypeNAA
Industry STD TermCCGA
JEDEC CodeS-CBGA-N
Package QTY1
Device MarkingADC10D1000CCMLS
Width (mm)27.94
Length (mm)27.94
Thickness (mm)2.79
Pitch (mm)1.27
Max Height (mm)3.5
Mechanical Data下载

参数化

# Input Channels2,1
Analog Voltage AVDD(Max)2.2 V
Analog Voltage AVDD(Min)1.8 V
ArchitectureFolding Interpolating
ENOB9 Bits
INL(Max)0.7 +/-LSB
INL(Typ)0.7 +/-LSB
InterfaceParallel LVDS
Operating Temperature Range-55 to 125,25 C
Package GroupCCGA
Package Size: mm2:W x L376CCGA: 781 mm2: 27.94 x 27.94(CCGA) PKG
Power Consumption(Typ)2900 mW
RatingSpace
Reference ModeInt
Resolution10 Bits
SFDR63 dB
SNR56.8 dB
Sample Rate (max)2GSPS SPS

生态计划

RoHSSee ti.com

设计套件和评估模块

  • Evaluation Modules & Boards: ADC-LD-BB
    ADC Low Distortion Balun Board
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC10D1000CVAL
    10-Bit, Dual 1.0 GSPS / Single 2.0 GSPS Signal Acquisition Evaluation Board
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC12D1600CVAL
    ADC12D1600QML-SP 12-Bit, Dual 1.6- or Single 3.2-GSPS, RF-Sampling ADC Evaluation Module - Aerospace
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC-WB-BB
    ADC Wide Band Balun Board
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: TC1-DESIQ-SBB
    TC1 DESIQ Single Balun Board
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Signal Chain Noise Figure Analysis
    PDF, 615 Kb, 档案已发布: Oct 29, 2014
  • Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs
    PDF, 943 Kb, 档案已发布: Aug 6, 2014
  • AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C)
    PDF, 60 Kb, 修订版: C, 档案已发布: May 1, 2013
    In order to facilitate upgrading applications from a 10-bit Gig ADC to a 12-bit Gig ADC, the ADC10D1x00(ADC10D1500/ADC10D1000) is designed to be pin-compatible with the ADC12D1x00(ADC12D1800/1600/1000). This means that a single board layout may be designed with both resolutionADCs in mind for more cost efficient and time-to-market product development.
  • From Sample Instant to Data Output: Understanding Latency in the GSPS ADC
    PDF, 392 Kb, 档案已发布: Dec 18, 2012
    For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products,
  • AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)
    PDF, 169 Kb, 修订版: G, 档案已发布: Feb 3, 2017

模型线

系列: ADC10D1000QML-SP (2)

制造商分类

  • Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters