SN74LVC2G80
www.ti.com SCES309F – DECEMBER 2001 – REVISED DECEMBER 2013 Dual Positive-Edge-Triggered D-Type Flip-Flop
Check for Samples: SN74LVC2G80 FEATURES DESCRIPTION This dual positive-edge-triggered D-type flip-flop is
designed for 1.65-V to 5.5-V VCC operation. 1 2 Available in the Texas Instruments
NanoFreeв„ў Package
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 4.2 ns at 3.3 V
Low Power Consumption, 10-ОјA Max ICC
Typical VOLP (Output Ground Bounce)
2 V at VCC = 3.3 V, TA = 25В°C
Ioff Feature Supports Live Insertion, PartialPower-Down and Back Drive Protection
Mode Operation
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101) When data at the data (D) input meets the setup time
requirement, the data is transferred to the Q output
on the positive-going edge of the clock pulse. Clock
triggering occurs at a voltage level and is not directly
related to the rise time of the clock pulse. Following …
