Datasheet Texas Instruments SN74AVC16827DGVR — 数据表

制造商Texas Instruments
系列SN74AVC16827
零件号SN74AVC16827DGVR
Datasheet Texas Instruments SN74AVC16827DGVR

具有三态输出的20位缓冲器/驱动器56-TVSOP -40至85

数据表

20-Bit Buffer/Driver With 3-State Outputs datasheet
PDF, 363 Kb, 修订版: I, 档案已发布: Jun 29, 2000
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

Pin56
Package TypeDGV
Industry STD TermTVSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingCVA827
Width (mm)4.4
Length (mm)11.3
Thickness (mm)1.05
Pitch (mm).4
Max Height (mm)1.2
Mechanical Data下载

参数化

Bits20
F @ Nom Voltage(Max)200 Mhz
ICC @ Nom Voltage(Max)0.04 mA
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)-12/12 mA
Package GroupTVSOP
Package Size: mm2:W x L56TVSOP: 72 mm2: 6.4 x 11.3(TVSOP) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyAVC
VCC(Max)3.6 V
VCC(Min)1.2 V
Voltage(Nom)1.2,1.5,1.8,2.5,3.3 V
tpd @ Nom Voltage(Max)3,3.2,2.9,1.9,1.7 ns

生态计划

RoHSCompliant

应用须知

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, 修订版: B, 档案已发布: Jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, 修订版: A, 档案已发布: Aug 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, 修订版: B, 档案已发布: Apr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, 修订版: B, 档案已发布: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa

模型线

系列: SN74AVC16827 (2)

制造商分类

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver