Datasheet Texas Instruments ADS8365IPAG — 数据表

制造商Texas Instruments
系列ADS8365
零件号ADS8365IPAG
Datasheet Texas Instruments ADS8365IPAG

16位250kSPS 6通道同时采样SAR ADC 64-TQFP -40至85

数据表

16-Bit, 250kSPS 6-Channel Simultaneous Sampling SAR Analog-to-Digital Converters datasheet
PDF, 988 Kb, 修订版: C, 档案已发布: Mar 27, 2008
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin64
Package TypePAG
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY160
CarrierJEDEC TRAY (10+1)
Device MarkingADS8365AI
Width (mm)10
Length (mm)10
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

参数化

# Input Channels6
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)4 +/-LSB
Input Range(Max)2.6 V
Input Range(Min)-2.6 V
Input TypePseudo-Differential
Integrated FeaturesN/A
InterfaceParallel
Multi-Channel ConfigurationSimultaneous Sampling
Operating Temperature Range-40 to 85 C
Package GroupTQFP
Package Size: mm2:W x L64TQFP: 144 mm2: 12 x 12(TQFP) PKG
Power Consumption(Typ)190 mW
RatingCatalog
Reference ModeExt,Int
Resolution16 Bits
SINAD87 dB
SNR88 dB
Sample Rate (max)250kSPS SPS
Sample Rate(Max)0.25 MSPS
THD(Typ)-94 dB

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: ADS8365M-EVM
    ADS8365M Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

系列: ADS8365 (3)

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)