[ /Title
(CD74H
C165,
CD74H
CT165)
/Subject
(High
Speed
CMOS
Logic 8Bit Parallel-CD54HC165, CD74HC165,
CD54HCT165, CD74HCT165
Data sheet acquired from Harris Semiconductor
SCHS156C February 1998 -Revised October 2003 High-Speed CMOS Logic
8-Bit Parallel-In/Serial-Out Shift Register Features Description Buffered Inputs The ’HC165 and ’HCT165 are 8-bit parallel or serial-in shift
registers with complementary serial outputs (Q7 and Q7)
available from the last stage. When the parallel load (PL)
input is LOW, parallel data from the D0 to D7 inputs are
loaded into the register asynchronously. When the PL is
HIGH, data enters the register serially at the DS input and
shifts one place to the right (Q0в†’Q1в†’Q2, etc.) with each
positive-going clock transition. This feature allows parallelto-serial converter expansion by typing the Q7 output to the
DS input of the succeeding device. Asynchronous Parallel Load Complementary Outputs Fanout (Over Temperature Range)
-Standard Outputs . 10 LSTTL Loads …
