Datasheet Texas Instruments TLC2552CDGKG4 — 数据表

12位，400 kSPS ADC，串行输出，与TMS320兼容（最高10MHz），双通道自动扫描8-VSSOP 0至70

数据表

PDF, 1.1 Mb, 修订版: D, 档案已发布: Oct 17, 2002

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Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

# Input Channels	2
Analog Voltage AVDD(Max)	5.5 V
Analog Voltage AVDD(Min)	4.5 V
Architecture	SAR
Digital Supply(Max)	5.5 V
Digital Supply(Min)	4.5 V
INL(Max)	1 +/-LSB
Input Range(Max)	5.5 V
Input Type	Single-Ended
Integrated Features	N/A
Interface	SPI
Multi-Channel Configuration	Multiplexed
Operating Temperature Range	-40 to 85,0 to 70 C
Package Group	VSSOP
Package Size: mm2:W x L	8VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG
Power Consumption(Typ)	15 mW
Rating	Catalog
Reference Mode	Ext
Resolution	12 Bits
SINAD	72 dB
SNR	72 dB
Sample Rate (max)	400kSPS SPS
Sample Rate(Max)	0.4 MSPS
THD(Typ)	-84 dB

RoHS

Compliant

Evaluation Modules & Boards: 5-6KINTERFACE
5-6K Interface Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
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Interfacing the TLC2552 and TLV2542 to the MSP430F149
PDF, 123 Kb, 档案已发布: Feb 10, 2003
This application note discusses the features of the TLC2552 and TLV2542 ADC. An SPI interface code example for the MSP430F149 to the TLC2552 ADC, and for the MSP430F149 to the TLV2542 ADC, are also presented.
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Determining Minimum Acquisition Times for SAR ADCs, part 2
PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

系列: TLC2552 (6)

Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)