SN74LVC2G132
www.ti.com SCES547D – FEBRUARY 2004 – REVISED DECEMBER 2013 Dual 2-Input NAND Gate With Schmitt-Trigger Inputs
Check for Samples: SN74LVC2G132 FEATURES DESCRIPTION This dual 2-input NAND gate with Schmitt-trigger
inputs is designed for 1.65-V to 5.5-V VCC operation. 1 2 Available in Texas Instruments NanoFreeв„ў
Package
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 5.3 ns at 3.3 V
Low Power Consumption, 10-ОјA Max ICC
В±24-mA Output Drive at 3.3 V
Typical VOLP (Output Ground Bounce) 2 V at
VCC = 3.3 V, TA = 25В°C
Ioff Supports Live Insertion, Partial Power
Down Mode, and Back Drive Protection
Support Translation Down (5V to 3.3V and 3.3V
to 1.8V)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCT PACKAGE …
