Datasheet Texas Instruments SN74LV393ADR — 数据表


      

SCLS457D -FEBRUARY 2001 -REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation
D Max tpd of 10 ns at 5 V
D Typical VOLP (Output Ground Bounce) D
D
D
D
D
D 2.3 V at VCC = 3.3 V, TA = 25В°C
Ioff Supports Partial-Power-Down-Mode
Operation
Dual 4-Bit Binary Counters With Individual
Clocks
Direct Clear for Each 4-Bit Counter
Can Significantly Improve System
Densities by Reducing Counter Package
Count by 50 Percent
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
-2000-V Human-Body Model (A114-A)
-200-V Machine Model (A115-A)
-1000-V Charged-Device Model (C101) 1CLK …