Datasheet Texas Instruments TRF3765IRHBT — 数据表

制造商Texas Instruments
系列TRF3765
零件号TRF3765IRHBT
Datasheet Texas Instruments TRF3765IRHBT

具有集成VCO和多达8个输出的300M-4800MHz低噪声Integer-N / Fractional-N PLL 32-VQFN -40至85

数据表

TRF3765 Integer-N/Fractional-N PLL With Integrated VCO datasheet
PDF, 1.8 Mb, 修订版: E, 档案已发布: Jan 7, 2016
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityYes

打包

Pin3232
Package TypeRHBRHB
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device MarkingIRHBTRF3765
Width (mm)55
Length (mm)55
Thickness (mm).9.9
Pitch (mm).5.5
Max Height (mm)11
Mechanical Data下载下载

参数化

1/f Noise (10 kHz offset at 1 GHz carrier)-106 dBc/Hz
Current Consumption115 mA
Integrated VCOYes
Lock Time(Typ)60 us
Normalized PLL Phase Noise-221 dBc/Hz
Operating Temperature Range-40 to 85 C
Output Frequency(Max)4800 MHz
Output Frequency(Min)300 MHz
Package Size: mm2:W x L32VQFN: 25 mm2: 5 x 5(VQFN) PKG
RatingCatalog
Special FeaturesWideband
VCC3.3 V
VCO Phase Noise(Nom)-133 dBc/Hz

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: TSW3065EVM
    TSW3065 Standalone Local Oscillator Source Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: TRF3765EVM
    TRF3765 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: TSW12J54EVM
    Wideband RF Receiver Reference Design
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: DAC34SH84EVM
    DAC34SH84 Quad-Channel, 16-Bit, 1.5-GSPS Digital-to-Analog Converter Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Low supply TRF3765 performance evaluation
    PDF, 130 Kb, 档案已发布: Jan 4, 2012
  • TRF3765 Output Terminations
    PDF, 248 Kb, 档案已发布: Jan 4, 2012
  • TRF3765 REF_IN Impedance Application Note
    PDF, 92 Kb, 档案已发布: Jan 11, 2012
  • TRF3765 Synthesizer Lock Time
    PDF, 448 Kb, 档案已发布: Feb 6, 2012
    PLL lock time is an important metric in many synthesizer applications. Because the TRF3765 uses multiple VCOs and digitally switched capacitor banks to achieve extremely wideband operation, PLL lock is a two-step process of switching to the proper digital setting followed by analog frequency lock. This wideband operation along with digital frequency band selection requires a different set of timi
  • Supply Noise Effect on Oscillator Phase Noise
    PDF, 1.2 Mb, 档案已发布: Nov 22, 2011
    This report provides the description of local oscillator (LO) phase noise degradation due to supply noise. Brief theoretical information supported by experiments carried out to demonstrate this degradation is discussed. The importance of selecting appropriate low-noise LDO (low-dropout) linear regulators is discussed. The impact of improper LDO within in-band phase noise of a multi-GHz synthesizer
  • Characterization Report for FMC30RF
    PDF, 11.3 Mb, 档案已发布: Sep 18, 2014
  • JESD204B multi-device synchronization: Breaking down the requirements
    PDF, 146 Kb, 档案已发布: Apr 28, 2015
  • Analog Applications Journal 2Q 2015
    PDF, 2.5 Mb, 档案已发布: Apr 28, 2015

模型线

系列: TRF3765 (2)

制造商分类

  • Semiconductors > Clock and Timing > RF PLLs and Synthesizers