Datasheet Texas Instruments SN74LVT125NSR — 数据表

制造商Texas Instruments
系列SN74LVT125
零件号SN74LVT125NSR
Datasheet Texas Instruments SN74LVT125NSR

具有三态输出的3.3V ABT四路总线缓冲器14-SO -40至85

数据表

SN74LVT125 datasheet
PDF, 673 Kb, 修订版: F, 档案已发布: Oct 13, 2003
从文件中提取

价格

状态

Lifecycle StatusNRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin14
Package TypeNS
Industry STD TermSOP
JEDEC CodeR-PDSO-G
Package QTY2000
CarrierLARGE T&R
Device MarkingLVT125
Width (mm)5.3
Length (mm)10.3
Thickness (mm)1.95
Pitch (mm)1.27
Max Height (mm)2
Mechanical Data下载

参数化

Bits4
F @ Nom Voltage(Max)100 Mhz
ICC @ Nom Voltage(Max)0.007 mA
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)-32/64 mA
Package GroupSOIC,SSOP,TSSOP
Package Size: mm2:W x L14SOIC: 52 mm2: 6 x 8.65(SOIC),14SSOP: 48 mm2: 7.8 x 6.2(SSOP),14TSSOP: 32 mm2: 6.4 x 5(TSSOP) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
Voltage(Nom)3.3 V
tpd @ Nom Voltage(Max)4 ns

生态计划

RoHSCompliant

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

模型线

制造商分类

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver