Datasheet Texas Instruments ADS8323Y/250 — 数据表

制造商Texas Instruments
系列ADS8323
零件号ADS8323Y/250
Datasheet Texas Instruments ADS8323Y/250

伪双极性16位500kSPS CMOS模数转换器32-TQFP -40至85

数据表

ADS8323: 16-Bit, 500kSPS, microPower Sampling Analog-to-Digital Converter datasheet
PDF, 1.0 Mb, 修订版: C, 档案已发布: Jan 5, 2010
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin32
Package TypePBS
Industry STD TermTQFP
JEDEC CodeS-PQFP-G
Package QTY250
CarrierSMALL T&R
Device MarkingA23Y
Width (mm)5
Length (mm)5
Thickness (mm)1
Pitch (mm).5
Max Height (mm)1.2
Mechanical Data下载

参数化

# Input Channels1
Analog Voltage AVDD(Max)5.25 V
Analog Voltage AVDD(Min)4.75 V
ArchitectureSAR
Digital Supply(Max)5.25 V
Digital Supply(Min)4.75 V
INL(Max)4 +/-LSB
Input Range(Max)5.25 V
Input TypeDifferential
Integrated FeaturesN/A
InterfaceParallel
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupTQFP
Package Size: mm2:W x L32TQFP: 49 mm2: 7 x 7(TQFP) PKG
Power Consumption(Typ)85 mW
RatingCatalog
Reference ModeExt,Int
Resolution16 Bits
SINAD83 dB
SNR83 dB
Sample Rate (max)500kSPS SPS
Sample Rate(Max)0.5 MSPS
THD(Typ)-93 dB

生态计划

RoHSCompliant

设计套件和评估模块

  • Evaluation Modules & Boards: ADS8323EVM
    ADS8323 Evaluation Module
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)