Datasheet Texas Instruments ADC12D800RFIUT — 数据表

制造商Texas Instruments
系列ADC12D800RF
零件号ADC12D800RFIUT
Datasheet Texas Instruments ADC12D800RFIUT

12位,双800-MSPS或单个1.6-GSPS,RF采样模数转换器(ADC)292-BGA -40至85

数据表

ADC12D800/500RF 12-Bit, 1.6/1.0 GSPS RF Sampling ADC datasheet
PDF, 2.0 Mb, 修订版: E, 档案已发布: Mar 25, 2013
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin292
Package TypeNXA
Industry STD TermBGA
JEDEC CodeS-PBGA-N
Package QTY40
CarrierJEDEC TRAY (10+1)
Device MarkingADC12D800RFIUT
Width (mm)27
Length (mm)27
Thickness (mm)2.38
Pitch (mm)1.27
Max Height (mm)2.4
Mechanical Data下载

参数化

# Input Channels2,1
Analog Input BW2700 MHz
ArchitectureFolding Interpolating
DNL(Max)0.4 +/-LSB
DNL(Typ)0.4 +/-LSB
ENOB9.6 Bits
INL(Max)2.5 +/-LSB
INL(Typ)2.5 +/-LSB
Input BufferYes
Input Range0.8 Vp-p
InterfaceParallel LVDS
Operating Temperature Range-40 to 85 C
Package GroupBGA
Package Size: mm2:W x L292BGA: 729 mm2: 27 x 27(BGA) PKG
Power Consumption(Typ)2500 mW
RatingCatalog
Reference ModeInt
Resolution12 Bits
SFDR73.4 dB
SINAD59.7 dB
SNR60.2 dB
Sample Rate(Max)800,1600 MSPS

生态计划

RoHSSee ti.com

设计套件和评估模块

  • Evaluation Modules & Boards: TC1-DESIQ-SBB
    TC1 DESIQ Single Balun Board
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC-LD-BB
    ADC Low Distortion Balun Board
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC-WB-BB
    ADC Wide Band Balun Board
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: ADC12D800RFRB
    12-Bit, Dual 800 MSPS or Single 1.6 GSPS A/D Converter Reference Board
    Lifecycle Status: Active (Recommended for new designs)

应用须知

  • Synchronizing the Giga-Sample ADCs Interfaced with Multiple FPGAs
    PDF, 943 Kb, 档案已发布: Aug 6, 2014
  • AN-2177 Using the LMH6554 as a ADC Driver (Rev. A)
    PDF, 1.7 Mb, 修订版: A, 档案已发布: Apr 26, 2013
    This application report discusses the use of the Texas Instruments LMH6554 as an ADC driver.
  • From Sample Instant to Data Output: Understanding Latency in the GSPS ADC
    PDF, 392 Kb, 档案已发布: Dec 18, 2012
    For many applications which use ultra high-speed ADCs, latency can be a critical performance specification. For example, if the ADC is used in any kind of feedback loop, then the absolute latency is an important factor. For a MIMO system such as a phased array radar, the relative difference and variability in latency becomes important. This application note covers latency in the GSPS ADC products,
  • AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G)
    PDF, 169 Kb, 修订版: G, 档案已发布: Feb 3, 2017
  • Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat
    PDF, 720 Kb, 档案已发布: Dec 9, 2013
    The SFDR performance of an ADC is limited by the largest spur in the spectrum from DC to Fs / 2. These spurs can either be reduced or avoided entirely for maximum SFDR performance, based on the application. This reference design explores the reason behind spurs in the 10-bit and 12-bit GSPS ADCfamily. The specific products covered are: ADC12D1800RF, ADC12D1600RF, ADC12D1000RF, ADC12D800RF, ADC12

模型线

系列: ADC12D800RF (2)

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > High Speed ADCs (>10MSPS)