Datasheet Texas Instruments ADS8318IBDGSR — 数据表

制造商Texas Instruments
系列ADS8318
零件号ADS8318IBDGSR
Datasheet Texas Instruments ADS8318IBDGSR

16位,单极性差分输入,500kSPS串行输出,4.5V至5.5V的微功耗采样ADC 10-VSSOP -40至85

数据表

16-Bit, 500-KSPS, Serial Interface microPOWER, Miniature SAR ADC* datasheet
PDF, 1.9 Mb, 修订版: A, 档案已发布: Mar 23, 2011
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin10
Package TypeDGS
Industry STD TermVSSOP
JEDEC CodeS-PDSO-G
Package QTY2500
CarrierLARGE T&R
Device MarkingCBC
Width (mm)3
Length (mm)3
Thickness (mm)1.02
Pitch (mm).5
Max Height (mm)1.07
Mechanical Data下载

参数化

# Input Channels1
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)4.5 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.375 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input Range(Min)-5.5 V
Input TypeDifferential
Integrated FeaturesDaisy-Chainable
InterfaceSPI
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85 C
Package GroupVSSOP
Package Size: mm2:W x L10VSSOP: 15 mm2: 4.9 x 3(VSSOP) PKG
Power Consumption(Typ)18 mW
RatingCatalog
Reference ModeExt
Resolution16 Bits
SINAD96 dB
SNR96 dB
Sample Rate (max)500kSPS SPS
Sample Rate(Max)0.5 MSPS
THD(Typ)-114 dB

生态计划

RoHSCompliant
Pb FreeYes

应用须知

  • ADC Parameters Unit Conversion
    PDF, 761 Kb, 档案已发布: Mar 5, 2013
  • Low Power Input and Reference Driver Circuit for ADS8318 and ADS8319
    PDF, 1.5 Mb, 档案已发布: Jun 24, 2009
    The one size fits all approach to operational amplifiers is not effective. Every application has its own specific requirements that must be fulfilled. Appropriate selection of the op amp that drives an analog-to-digital converter (ADC) in a low-power application is a critical step. Most available low-power op amps trade off low-power features with other parameters such as bandwidth, settling t
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, 档案已发布: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, 修订版: A, 档案已发布: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, 修订版: B, 档案已发布: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, 修订版: A, 档案已发布: Apr 16, 2015

模型线

制造商分类

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)