Datasheet Texas Instruments TLV1548QDBRG4Q1 — 数据表
| 制造商 | Texas Instruments |
| 系列 | TLV1548-Q1 |
| 零件号 | TLV1548QDBRG4Q1 |
具有串行控制和8个模拟输入20-SSOP的汽车低压10位模数转换器-40至125
数据表
Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input datasheet
PDF, 532 Kb, 修订版: B, 档案已发布: Apr 30, 2008
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价格
状态
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
打包
| Pin | 20 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | 1548Q1 |
| Width (mm) | 5.3 |
| Length (mm) | 7.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | 下载 |
参数化
| # Input Channels | 8 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 2.7 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 1 +/-LSB |
| Input Range(Max) | 5.5 V |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | SPI |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 125 C |
| Package Group | SSOP |
| Package Size: mm2:W x L | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) PKG |
| Power Consumption(Typ) | 1.05 mW |
| Rating | Automotive |
| Reference Mode | Ext |
| Resolution | 10 Bits |
| SINAD | N/A dB |
| Sample Rate (max) | 85kSPS SPS |
| Sample Rate(Max) | 0.085 MSPS |
| THD(Typ) | N/A dB |
生态计划
| RoHS | Compliant |
应用须知
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, 修订版: A, 档案已发布: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, 档案已发布: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
模型线
系列: TLV1548-Q1 (2)
- TLV1548QDBRG4Q1 TLV1548QDBRQ1
制造商分类
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)