Datasheet Texas Instruments SN74LVT240APW — 数据表

制造商Texas Instruments
系列SN74LVT240A
零件号SN74LVT240APW
Datasheet Texas Instruments SN74LVT240APW

具有三态输出的3.3V ABT八路缓冲器/驱动器20-TSSOP -40至85

数据表

SN74LVT240A datasheet
PDF, 1.1 Mb, 修订版: K, 档案已发布: Jan 14, 2004
从文件中提取

价格

状态

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

打包

Pin20
Package TypePW
Industry STD TermTSSOP
JEDEC CodeR-PDSO-G
Package QTY70
CarrierTUBE
Device MarkingLX240A
Width (mm)4.4
Length (mm)6.5
Thickness (mm)1
Pitch (mm).65
Max Height (mm)1.2
Mechanical Data下载

参数化

Bits8
F @ Nom Voltage(Max)160 Mhz
ICC @ Nom Voltage(Max)0.005 mA
Operating Temperature Range-40 to 85 C
Output Drive (IOL/IOH)(Max)-32/64 mA
Package GroupTSSOP
Package Size: mm2:W x L20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG
RatingCatalog
Schmitt TriggerNo
Technology FamilyLVT
VCC(Max)3.6 V
VCC(Min)2.7 V
Voltage(Nom)3.3 V
tpd @ Nom Voltage(Max)3.8 ns

生态计划

RoHSCompliant

应用须知

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, 修订版: A, 档案已发布: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, 档案已发布: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.

模型线

制造商分类

  • Semiconductors > Logic > Buffer/Driver/Transceiver > Inverting Buffer/Driver