Datasheet ADG5433W (Analog Devices) - 5
| 制造商 | Analog Devices |
| 描述 | High Voltage, Latch-up Proof, Triple SPDT Switches |
| 页数 / 页 | 20 / 5 — Data Sheet. ADG5433W. 12 V SINGLE SUPPLY. Table 3. Parameter. Min. Typ1. … |
| 修订版 | A |
| 文件格式/大小 | PDF / 387 Kb |
| 文件语言 | 英语 |
Data Sheet. ADG5433W. 12 V SINGLE SUPPLY. Table 3. Parameter. Min. Typ1. Max. Unit Test Conditions/Comments
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Data Sheet ADG5433W 12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3. Parameter Min Typ1 Max Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 26 42 Ω VS = 0 V to 10 V, IS = −10 mA, VDD = 10.8 V, VSS = 0 V; see Figure 23 On-Resistance Match Between Channels, 0.3 1.6 Ω VS = 0 V to 10 V, IS = −10 mA ∆RON On-Resistance Flatness, RFLAT (ON) 5.5 12 Ω VS = 0 V to 10 V, IS = −10 mA LEAKAGE CURRENTS VDD = 13.2 V, VSS = 0 V Source Off Leakage, IS (Off) ±0.05 ±10 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 22 Drain Off Leakage, ID (Off) ±0.1 ±30 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 22 Channel On Leakage, ID (On), IS (On) ±0.1 ±30 nA VS = VD = 1 V/10 V; see Figure 22 DIGITAL INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Input Current, IINL or IINH 0.002 µA VIN = VGND or VDD ±0.1 µA Digital Input Capacitance, CIN 6 pF DYNAMIC CHARACTERISTICS2 Transition Time, tTRANSITION 220 400 ns RL = 300 Ω, CL = 35 pF, VS = 8 V tON (EN) 228 426 ns RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 30 tOFF (EN) 90 151 ns RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 30 Break-Before-Make Time Delay, tD 54 106 ns RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V; see Figure 29 Charge Injection, QINJ 60 pC VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 31 Off Isolation −60 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 25 Channel-to-Channel Crosstalk −60 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 24 Total Harmonic Distortion + Noise 0.1 % RL = 1 kΩ, 6 V p-p, f = 20 Hz to 20 kHz; see Figure 26 −3 dB Bandwidth 150 MHz RL = 50 Ω, CL = 5 pF; see Figure 27 Insertion Loss −0.8 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 CS (Off) 18 pF VS = 6 V, f = 1 MHz CD (Off) 28 pF VS = 6 V, f = 1 MHz CD (On), CS (On) 54 pF VS = 6 V, f = 1 MHz POWER REQUIREMENTS VDD = 13.2 V IDD 40 µA Digital inputs = 0 V or VDD 50 65 µA VDD 9 40 V GND = 0 V, VSS = 0 V 1 Typical specifications represent average readings at 25°C. 2 Guaranteed by design; not subject to production test. Rev. A | Page 5 of 20 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx or Dx Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Trench Isolation Applications Information Outline Dimensions Ordering Guide Automotive Products
Data Sheet ADG5433W 12 V SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3. Parameter Min Typ1 Max Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 26 42 Ω VS = 0 V to 10 V, IS = −10 mA, VDD = 10.8 V, VSS = 0 V; see Figure 23 On-Resistance Match Between Channels, 0.3 1.6 Ω VS = 0 V to 10 V, IS = −10 mA ∆RON On-Resistance Flatness, RFLAT (ON) 5.5 12 Ω VS = 0 V to 10 V, IS = −10 mA LEAKAGE CURRENTS VDD = 13.2 V, VSS = 0 V Source Off Leakage, IS (Off) ±0.05 ±10 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 22 Drain Off Leakage, ID (Off) ±0.1 ±30 nA VS = 1 V/10 V, VD = 10 V/1 V; see Figure 22 Channel On Leakage, ID (On), IS (On) ±0.1 ±30 nA VS = VD = 1 V/10 V; see Figure 22 DIGITAL INPUTS Input High Voltage, VINH 2.0 V Input Low Voltage, VINL 0.8 V Input Current, IINL or IINH 0.002 µA VIN = VGND or VDD ±0.1 µA Digital Input Capacitance, CIN 6 pF DYNAMIC CHARACTERISTICS2 Transition Time, tTRANSITION 220 400 ns RL = 300 Ω, CL = 35 pF, VS = 8 V tON (EN) 228 426 ns RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 30 tOFF (EN) 90 151 ns RL = 300 Ω, CL = 35 pF, VS = 8 V; see Figure 30 Break-Before-Make Time Delay, tD 54 106 ns RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 8 V; see Figure 29 Charge Injection, QINJ 60 pC VS = 6 V, RS = 0 Ω, CL = 1 nF; see Figure 31 Off Isolation −60 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 25 Channel-to-Channel Crosstalk −60 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 24 Total Harmonic Distortion + Noise 0.1 % RL = 1 kΩ, 6 V p-p, f = 20 Hz to 20 kHz; see Figure 26 −3 dB Bandwidth 150 MHz RL = 50 Ω, CL = 5 pF; see Figure 27 Insertion Loss −0.8 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 27 CS (Off) 18 pF VS = 6 V, f = 1 MHz CD (Off) 28 pF VS = 6 V, f = 1 MHz CD (On), CS (On) 54 pF VS = 6 V, f = 1 MHz POWER REQUIREMENTS VDD = 13.2 V IDD 40 µA Digital inputs = 0 V or VDD 50 65 µA VDD 9 40 V GND = 0 V, VSS = 0 V 1 Typical specifications represent average readings at 25°C. 2 Guaranteed by design; not subject to production test. Rev. A | Page 5 of 20 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications ±15 V Dual Supply ±20 V Dual Supply 12 V Single Supply 36 V Single Supply Continuous Current per Channel, Sx or Dx Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Trench Isolation Applications Information Outline Dimensions Ordering Guide Automotive Products