Datasheet HMC637ASCPZ-EP (Analog Devices) - 3
| 制造商 | Analog Devices |
| 描述 | GaAs, pHEMT, MMIC, 1 W Power Amplifier, 0.1 GHz to 6 GHz |
| 页数 / 页 | 9 / 3 — Enhanced Product. HMC637ASCPZ-EP. SPECIFICATIONS. ELECTRICAL … |
| 文件格式/大小 | PDF / 240 Kb |
| 文件语言 | 英语 |
Enhanced Product. HMC637ASCPZ-EP. SPECIFICATIONS. ELECTRICAL SPECIFICATIONS. Table 1. Parameter. Symbol Test Conditions/Comments
该数据表的模型线
文件文字版本
Enhanced Product HMC637ASCPZ-EP SPECIFICATIONS ELECTRICAL SPECIFICATIONS
TA = 25°C, VDD = 12 V, VGG2 = 5 V, supply current (IDD) = 400 mA (adjust VGG1 between −2 V to 0 V to achieve IDD = 400 mA typical), 50 Ω system, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
FREQUENCY RANGE 0.1 6 GHz GAIN 12 13 dB Gain Flatness ±0.75 dB Gain Variation Over Temperature 0.015 dB/°C RETURN LOSS Input 12 dB Output 15 dB OUTPUT Output Power for 1 dB Compression P1dB 27 29 dBm Saturated Output Power PSAT 31 dBm Output Third-Order Intercept OIP3 Output power (POUT) per tone = 10 dBm, 1 MHz spacing 44 dBm NOISE FIGURE 12 dB 2.0 GHz to 6.0 GHz 5 dB SUPPLY CURRENT IDD 320 400 480 mA Drain Bias Voltage1 VDD IDD = 400 mA 11.5 V 12.0 V 12.5 V 1 VGG1 is initially set for nominal bias conditions of VDD = 12 V and VGG2 = 5 V to achieve a IDD = 400 mA typical, and then, adjust VDD ± 0.5 V from 12 V to measure the IDD variation. Rev. 0 | Page 3 of 9 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE POWER DERATING CURVES ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE
TA = 25°C, VDD = 12 V, VGG2 = 5 V, supply current (IDD) = 400 mA (adjust VGG1 between −2 V to 0 V to achieve IDD = 400 mA typical), 50 Ω system, unless otherwise noted.
Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
FREQUENCY RANGE 0.1 6 GHz GAIN 12 13 dB Gain Flatness ±0.75 dB Gain Variation Over Temperature 0.015 dB/°C RETURN LOSS Input 12 dB Output 15 dB OUTPUT Output Power for 1 dB Compression P1dB 27 29 dBm Saturated Output Power PSAT 31 dBm Output Third-Order Intercept OIP3 Output power (POUT) per tone = 10 dBm, 1 MHz spacing 44 dBm NOISE FIGURE 12 dB 2.0 GHz to 6.0 GHz 5 dB SUPPLY CURRENT IDD 320 400 480 mA Drain Bias Voltage1 VDD IDD = 400 mA 11.5 V 12.0 V 12.5 V 1 VGG1 is initially set for nominal bias conditions of VDD = 12 V and VGG2 = 5 V to achieve a IDD = 400 mA typical, and then, adjust VDD ± 0.5 V from 12 V to measure the IDD variation. Rev. 0 | Page 3 of 9 Document Outline FEATURES ENHANCED PRODUCT FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE POWER DERATING CURVES ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS OUTLINE DIMENSIONS ORDERING GUIDE