Datasheet LTC4124 (Analog Devices) - 18

制造商Analog Devices
描述100mA Wireless Li-Ion Charger with Low Battery Disconnect
页数 / 页30 / 18 — APPLICATIONS INFORMATION. Figure 13. Single Transistor Transmitter and …
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APPLICATIONS INFORMATION. Figure 13. Single Transistor Transmitter and LTC4124 10mA Charger Receiver

APPLICATIONS INFORMATION Figure 13 Single Transistor Transmitter and LTC4124 10mA Charger Receiver

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APPLICATIONS INFORMATION
AIR GAP 0.5mm ±0.25mm VIN V ACIN CC 5V VSEL2 4.7µF L V+ OE TX LRX LBSEL 7.5µH 7.2µH CTX DRX 1.8nF LTC6990 CRX LTC4124 3.3nF CHRG NTC OUT M1 BAT DIV GND SET DCIN + RNTCRX RSET 100k PRECHG VSEL1 GND ISEL1 ISEL2 49.9k CRX: MURATA, GRM155R71H332JA01D M1: INFINEON, BSS816NW LRX: WURTH, 760308101216 4124 F13 CTX: MURATA GRM155R71H182JA01D DRX: KINGBRIGHT, APG0603VGC LTX: WURTH, 760308103206 RNTCRX: MURATA, NCP03WF104F
Figure 13. Single Transistor Transmitter and LTC4124 10mA Charger Receiver DESIGN EXAMPLE 1: SINGLE TRANSISTOR TRANSMITTER
If the transmit LC tank frequency is set to 1.29 times the
AND LTC4124 10mA CHARGER RECEIVER
driving frequency, switching losses in M1 are significantly The single transistor transmitter shown in Figure 13 is an reduced due to zero voltage switching (ZVS). Figure 15 example of a DC/AC converter that can be used to drive and Figure 16 il ustrate the contrast in the switching wave- AC current into a transmit coil, L forms when the tank frequency is set at different values. TX. NMOS switch M1 is driven by a 50% duty cycle square wave generated by the LTC6990 oscillator. During the first half of the cycle, M1 is on and the current through LTX rises linearly. During the DRAIN VOLTAGE second half of the cycle, M1 is off and the current through 5V/DIV L 0 TX circulates through the LC tank formed by CTX and LTX. The current through LTX is shown in Figure 14. GATE VOLTAGE 200 5V/DIV 500ns/DIV 4124 F15
Figure 15. Voltage on the Drain and Gate
0
of NMOS M1 when f
50mA/DIV
TX-TANK = fDRIVE
–200 DRAIN VOLTAGE 500ns/DIV 4124 F14 5V/DIV
Figure 14. Current Through Transmit Coil
0 GATE VOLTAGE 5V/DIV 500ns/DIV 4124 F16
Figure 16. Voltage on the Drain and Gate of NMOS M1 when fTX-TANK = 1.29 • fDRIVE
Rev. A 18 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts