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  A-to-D Converter Does Frequency Translation &mdash DN259
  PDF, 93 Kb, 档案已发布: Jun 1, 2001
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  A-to-D Converter Does Frequency Translation – Design Note 259
  Derek Redmayne
  The need to characterize frequency sources, both in the
  laboratory and in the п¬Ѓeld, is increasingly important. The
  circuit in Figure 1 offers some interesting attributes in
  a compact and relatively inexpensive scheme. It uses
  an LTC В®1420 ADC to undersample a higher frequency,
  driving an LTC1668 DAC, followed by a п¬Ѓlter to perform a
  down conversion. The output of the п¬Ѓlter is subsequently
  resampled to produce a manageable sample rate for a
  single-chip microcontroller. In addition to characterizing
  the carrier in an IF strip or the output of a local oscillator,
  this technique is also useful for characterizing ADCs,
  DACs, clock sources, signal sources or the effects of
  logic devices or phase-locked loops on phase noise.
  Frequency conversion or translation is usually performed by a diode mixer or a Gilbert cell mixer. Down
  conversion is most often encountered in radio receivers;
  up conversion is more commonly used in transmitters. The common superheterodyne receiver usually
  involves one conversion to produce a п¬Ѓxed intermediate
  frequency (IF). Spectrum analyzers, cellular base stations, cable modems, microwave and satellite receivers,
  radar and optical communications systems all include
  frequency conversion blocks. Down Conversion with an ADC
  It may not be commonly known that down conversion …

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  Ultralow Power 14-Bit Serial ADC Samples at 400ksps &mdash LT Journal
  PDF, 138 Kb, 档案已发布: Jun 1, 1999
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  DESIGN FEATURES Ultralow Power 14-Bit Serial ADC
  Samples at 400ksps
  by Dave Thomas and
  Kevin R. Hoskins
  Introduction High Performance
  with Low Power
  Figure 1 shows a block diagram of the
  LTC1417. This device includes a high
  performance differential sample-andhold circuit, an ultra-efficient
  successive-approximation ADC, an
  on-chip reference and a serial digital
  interface that easily interfaces to monics are below the noise floor. Figure 5 shows the second and third
  harmonic distortion versus input
  frequency.
  1.00 0.50 INL ERROR (LSB) вќЏ 400ksps throughput
  ❏ 82dB SINAD and –95dB THD at
  Nyquist
  ❏ Low power—20mW
  вќЏ Single 5V or В±5V supplies
  вќЏ 1.25LSB INL max and
  1LSB DNL max
  вќЏ Differential inputs
  вќЏ Serial data output …

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  Infinite Sample-and-Hold Outperforms Many Legacy Sample-and-Hold Amplifiers &mdash LT Journal
  PDF, 159 Kb, 档案已发布: Nov 1, 2000
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  DESIGN IDEAS Infinite Sample-and-Hold Outperforms
  Many Legacy Sample-and-Hold
  Amplifiers
  by Derek Redmayne
  Many applications requiring
  sample-and-hold amplifiers have been
  left high and dry by the dearth of
  these devices in today’s catalogs. The
  use of an ADC followed by a DAC can
  provide this function, as well as producing characteristics not possible
  with a conventional sample-and-hold.
  The circuit shown in Figure 1 is a
  simple and compact implementation
  of a topology referred to as an “infinite
  sample-and-hold.” It does not, in fact,
  hold for an infinite length of time but
  will do so until the power is turned off
  or until a new sample is required. The
  reason it is termed “infinite” is that it
  does not droop. It is formed from an
  ADC feeding a DAC. There is no droop
  because the sample is held as a digital code in the registers of the DAC.
  The overall accuracy of the infinite …

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• Data Conversion > Analog-to-Digital Converters (ADC) > Precision ADCs (Fs < 10Msps) > Single Channel ADCs