Datasheet Texas Instruments TLV4111 — 数据表

制造商	Texas Instruments
系列	TLV4111

高输出驱动，低压，单路运算放大器

数据表

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PDF, 1.6 Mb, 修订版: E, 档案已发布: Sep 29, 2006

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状态

	TLV4111CD	TLV4111CDGN	TLV4111ID	TLV4111IDG4	TLV4111IDGN	TLV4111IDGNG4	TLV4111IDGNR	TLV4111IDGNRG4	TLV4111IDR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	Yes	No	No	No	No

打包

	TLV4111CD	TLV4111CDGN	TLV4111ID	TLV4111IDG4	TLV4111IDGN	TLV4111IDGNG4	TLV4111IDGNR	TLV4111IDGNRG4	TLV4111IDR
N	1	2	3	4	5	6	7	8	9
Pin	8	8	8	8	8	8	8	8	8
Package Type	D	DGN	D	D	DGN	DGN	DGN	DGN	D
Industry STD Term	SOIC	HVSSOP	SOIC	SOIC	HVSSOP	HVSSOP	HVSSOP	HVSSOP	SOIC
JEDEC Code	R-PDSO-G	S-PDSO-G	R-PDSO-G	R-PDSO-G	S-PDSO-G	S-PDSO-G	S-PDSO-G	S-PDSO-G	R-PDSO-G
Package QTY	75	80	75	75	80	80	2500	2500	2500
Carrier	TUBE	TUBE	TUBE	TUBE	TUBE	TUBE	LARGE T&R	LARGE T&R	LARGE T&R
Device Marking	4111C	AHN	4111I	4111I	AHO	AHO	AHO	AHO	4111I
Width (mm)	3.91	3	3.91	3.91	3	3	3	3	3.91
Length (mm)	4.9	3	4.9	4.9	3	3	3	3	4.9
Thickness (mm)	1.58	1.02	1.58	1.58	1.02	1.02	1.02	1.02	1.58
Pitch (mm)	1.27	.65	1.27	1.27	.65	.65	.65	.65	1.27
Max Height (mm)	1.75	1.1	1.75	1.75	1.1	1.1	1.1	1.1	1.75
Mechanical Data	下载	下载	下载	下载	下载	下载	下载	下载	下载

参数化

Parameters / Models	TLV4111CD	TLV4111CDGN	TLV4111ID	TLV4111IDG4	TLV4111IDGN	TLV4111IDGNG4	TLV4111IDGNR	TLV4111IDGNRG4	TLV4111IDR
Additional Features	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A	N/A
Architecture	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
CMRR(Min), dB	68	68	68	68	68	68	68	68	68
CMRR(Typ), dB	68	68	68	68	68	68	68	68	68
GBW(Typ), MHz	2.7	2.7	2.7	2.7	2.7	2.7	2.7	2.7	2.7
Input Bias Current(Max), pA	25	25	25	25	25	25	25	25	25
Iq per channel(Max), mA	1	1	1	1	1	1	1	1	1
Iq per channel(Typ), mA	0.7	0.7	0.7	0.7	0.7	0.7	0.7	0.7	0.7
Number of Channels	1	1	1	1	1	1	1	1	1
Offset Drift(Typ), uV/C	3	3	3	3	3	3	3	3	3
Operating Temperature Range, C	-40 to 125,0 to 70	-40 to 125,0 to 70	-40 to 125,0 to 70	-40 to 125,0 to 70	-40 to 125,0 to 70	-40 to 125,0 to 70	-40 to 125,0 to 70	-40 to 125,0 to 70	-40 to 125,0 to 70
Output Current(Typ), mA	320	320	320	320	320	320	320	320	320
Package Group	SOIC	MSOP-PowerPAD	SOIC	SOIC	MSOP-PowerPAD	MSOP-PowerPAD	MSOP-PowerPAD	MSOP-PowerPAD	SOIC
Package Size: mm2:W x L, PKG	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8MSOP-PowerPAD: 15 mm2: 4.9 x 3(MSOP-PowerPAD)	8SOIC: 29 mm2: 6 x 4.9(SOIC)
Rail-to-Rail	In to V-,Out	In to V-,Out	In to V-,Out	In to V-,Out	In to V-,Out	In to V-,Out	In to V-,Out	In to V-,Out	In to V-,Out
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Slew Rate(Typ), V/us	1.57	1.57	1.57	1.57	1.57	1.57	1.57	1.57	1.57
Total Supply Voltage(Max), +5V=5, +/-5V=10	6	6	6	6	6	6	6	6	6
Total Supply Voltage(Min), +5V=5, +/-5V=10	2.5	2.5	2.5	2.5	2.5	2.5	2.5	2.5	2.5
Vos (Offset Voltage @ 25C)(Max), mV	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5

生态计划

	TLV4111CD	TLV4111CDGN	TLV4111ID	TLV4111IDG4	TLV4111IDGN	TLV4111IDGNG4	TLV4111IDGNR	TLV4111IDGNRG4	TLV4111IDR
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

应用须知

下载
TLV4110, TLV4111, TLV4112, TLV4113 EMI Immunity Performance (Rev. A)
PDF, 90 Kb, 修订版: A, 档案已发布: Nov 14, 2012

模型线

系列: TLV4111 (9)

TLV4111CD TLV4111CDGN TLV4111ID TLV4111IDG4 TLV4111IDGN TLV4111IDGNG4 TLV4111IDGNR TLV4111IDGNRG4 TLV4111IDR

制造商分类

Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> Power Op Amps