Datasheet Texas Instruments THS3095 — 数据表

制造商	Texas Instruments
系列	THS3095

具有关断功能的单路高电压，低失真，电流反馈运算放大器

数据表

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PDF, 1.5 Mb, 修订版: H, 档案已发布: Dec 31, 2015

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价格

状态

	THS3095D	THS3095DDA	THS3095DDAG4	THS3095DDAR	THS3095DG4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes	Yes	Yes	Yes	No

打包

	THS3095D	THS3095DDA	THS3095DDAG4	THS3095DDAR	THS3095DG4
N	1	2	3	4	5
Pin	8	8	8	8	8
Package Type	D	DDA	DDA	DDA	D
Industry STD Term	SOIC	HSOIC	HSOIC	HSOIC	SOIC
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	75	75	75	2500	75
Carrier	TUBE	TUBE	TUBE	LARGE T&R	TUBE
Device Marking	3095	3095	3095	3095	3095
Width (mm)	3.91	3.9	3.9	3.9	3.91
Length (mm)	4.9	4.89	4.89	4.89	4.9
Thickness (mm)	1.58	1.48	1.48	1.48	1.58
Pitch (mm)	1.27	1.27	1.27	1.27	1.27
Max Height (mm)	1.75	1.7	1.7	1.7	1.75
Mechanical Data	下载	下载	下载	下载	下载

参数化

Parameters / Models	THS3095D	THS3095DDA	THS3095DDAG4	THS3095DDAR	THS3095DG4
2nd Harmonic, dBc	66	66	66	66	66
3rd Harmonic, dBc	74	74	74	74	74
@ MHz	10	10	10	10	10
Acl, min spec gain, V/V	1	1	1	1	1
Additional Features	Shutdown	Shutdown	Shutdown	Shutdown	Shutdown
Architecture	Bipolar,Current FB	Bipolar,Current FB	Bipolar,Current FB	Bipolar,Current FB	Bipolar,Current FB
BW @ Acl, MHz	235	235	235	235	235
CMRR(Min), dB	62	62	62	62	62
CMRR(Typ), dB	69	69	69	69	69
GBW(Typ), MHz	235	235	235	235	235
Input Bias Current(Max), pA	15000000	15000000	15000000	15000000	15000000
Iq per channel(Max), mA	10.5	10.5	10.5	10.5	10.5
Iq per channel(Typ), mA	9.5	9.5	9.5	9.5	9.5
Number of Channels	1	1	1	1	1
Offset Drift(Typ), uV/C	10	10	10	10	10
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Output Current(Typ), mA	250	250	250	250	250
Package Group	SOIC	SO PowerPAD	SO PowerPAD	SO PowerPAD	SOIC
Package Size: mm2:W x L, PKG	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD)	8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD)	8SO PowerPAD: 29 mm2: 6 x 4.9(SO PowerPAD)	8SOIC: 29 mm2: 6 x 4.9(SOIC)
Rail-to-Rail	No	No	No	No	No
Rating	Catalog	Catalog	Catalog	Catalog	Catalog
Slew Rate(Typ), V/us	7300	7300	7300	7300	7300
Total Supply Voltage(Max), +5V=5, +/-5V=10	30	30	30	30	30
Total Supply Voltage(Min), +5V=5, +/-5V=10	10	10	10	10	10
Vn at 1kHz(Typ), nV/rtHz	2	2	2	2	2
Vn at Flatband(Typ), nV/rtHz	2	2	2	2	2
Vos (Offset Voltage @ 25C)(Max), mV	3	3	3	3	3

生态计划

	THS3095D	THS3095DDA	THS3095DDAG4	THS3095DDAR	THS3095DG4
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant

应用须知

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Design of Differential Filters for High-Speed Signal Chains (Rev. B)
PDF, 166 Kb, 修订版: B, 档案已发布: Apr 30, 2010
Differential filters have many desirable attributes. The task of designing differential filters can seem daunting at first. Single-ended filters designed in any filter design package can be converted to a differential implementation. This application report explores simple conversion techniques for low-pass, high-pass, and band-pass LC filters.
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Interfacing op amps to high-speed DACs, Part 1: Current-sinking DACs
PDF, 319 Kb, 档案已发布: Jul 14, 2009
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Interfacing op amps to high-speed DACs, Part 2: Current-sourcing DACs
PDF, 617 Kb, 档案已发布: Oct 4, 2009
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Design for a Wideband Differential Transimpedance DAC Output (Rev. A)
PDF, 438 Kb, 修订版: A, 档案已发布: Oct 17, 2016
High-speed digital-to-analog converters commonly offer a complementary current output signal. Most output interface implementations use either a resistive load and/or a transformer to convert this current source signal to a voltage. Where a dc-coupled interface is required, a carefully designed differential transimpedance stage can offer an attractive alternative. Design considerations and options
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Q3 2009 Issue Analog Applications Journal
PDF, 2.1 Mb, 档案已发布: Jul 14, 2009
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Voltage Feedback vs. Current Feedback Op Amps
PDF, 93 Kb, 档案已发布: Nov 30, 1998
This application report contrasts and compares the characteristics and capabilities of voltage and current feedback operational amplifiers. The report also points out the many similarities between the two versions.
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Stabilizing Current-Feedback Op Amps While Optimizing Circuit Performance
PDF, 280 Kb, 档案已发布: Apr 28, 2004
Optimizing a circuit design with a current-feedback (CFB) op amp is a relatively straightforward task, once one understands how CFB op amps achieve stability. This application note explains a 2nd-order CFB model so that any designer can better understand the flexibility of the CFB op amp. This report also discusses stability analysis, the effects of parasitic components due to PCBs, optimization
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Q4 2009 Issue Analog Applications Journal
PDF, 1.5 Mb, 档案已发布: Oct 4, 2009
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Designing for low distortion with high-speed op amps
PDF, 277 Kb, 档案已发布: Mar 2, 2005
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Noise Analysis for High Speed Op Amps (Rev. A)
PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

模型线

系列: THS3095 (5)

THS3095D THS3095DDA THS3095DDAG4 THS3095DDAR THS3095DG4

制造商分类

Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)