Datasheet Texas Instruments SN74LVC112A — 数据表
| 制造商 | Texas Instruments | 
| 系列 | SN74LVC112A | 

具有清晰和预置功能的双路负缘触发JK触发器
数据表
SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop  With Clear And Preset datasheet
PDF, 980 Kb, 修订版: M, 档案已发布: Dec 26, 2014
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状态
| SN74LVC112AD | SN74LVC112ADBLE | SN74LVC112ADBR | SN74LVC112ADG4 | SN74LVC112ADGVR | SN74LVC112ADGVRG4 | SN74LVC112ADR | SN74LVC112ADT | SN74LVC112ANSR | SN74LVC112APW | SN74LVC112APWE4 | SN74LVC112APWLE | SN74LVC112APWR | SN74LVC112APWRE4 | SN74LVC112APWRG4 | SN74LVC112APWT | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | 
| Manufacture's Sample Availability | No | No | No | No | No | No | No | No | No | No | No | No | No | No | No | No | 
打包
| SN74LVC112AD | SN74LVC112ADBLE | SN74LVC112ADBR | SN74LVC112ADG4 | SN74LVC112ADGVR | SN74LVC112ADGVRG4 | SN74LVC112ADR | SN74LVC112ADT | SN74LVC112ANSR | SN74LVC112APW | SN74LVC112APWE4 | SN74LVC112APWLE | SN74LVC112APWR | SN74LVC112APWRE4 | SN74LVC112APWRG4 | SN74LVC112APWT | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 | 16 | 
| Pin | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 
| Package Type | D | DB | DB | D | DGV | DGV | D | D | NS | PW | PW | PW | PW | PW | PW | PW | 
| Industry STD Term | SOIC | SSOP | SSOP | SOIC | TVSOP | TVSOP | SOIC | SOIC | SOP | TSSOP | TSSOP | TSSOP | TSSOP | TSSOP | TSSOP | TSSOP | 
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | 
| Package QTY | 40 | 2000 | 40 | 2000 | 2000 | 2500 | 250 | 2000 | 90 | 90 | 2000 | 2000 | 2000 | 250 | ||
| Carrier | TUBE | LARGE T&R | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | SMALL T&R | LARGE T&R | TUBE | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | SMALL T&R | ||
| Device Marking | LVC112A | LC112A | LVC112A | LC112A | LC112A | LVC112A | LVC112A | LVC112A | LC112A | LC112A | LC112A | LC112A | LC112A | LC112A | ||
| Width (mm) | 3.91 | 5.3 | 5.3 | 3.91 | 4.4 | 4.4 | 3.91 | 3.91 | 5.3 | 4.4 | 4.4 | 4.4 | 4.4 | 4.4 | 4.4 | 4.4 | 
| Length (mm) | 9.9 | 6.2 | 6.2 | 9.9 | 3.6 | 3.6 | 9.9 | 9.9 | 10.3 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 
| Thickness (mm) | 1.58 | 1.95 | 1.95 | 1.58 | 1.05 | 1.05 | 1.58 | 1.58 | 1.95 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 
| Pitch (mm) | 1.27 | .65 | .65 | 1.27 | .4 | .4 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 | .65 | .65 | .65 | .65 | 
| Max Height (mm) | 1.75 | 2 | 2 | 1.75 | 1.2 | 1.2 | 1.75 | 1.75 | 2 | 1.2 | 1.2 | 1.2 | 1.2 | 1.2 | 1.2 | 1.2 | 
| Mechanical Data | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 下载 | 
参数化
| Parameters / Models | SN74LVC112AD![]()  | SN74LVC112ADBLE![]()  | SN74LVC112ADBR![]()  | SN74LVC112ADG4![]()  | SN74LVC112ADGVR![]()  | SN74LVC112ADGVRG4![]()  | SN74LVC112ADR![]()  | SN74LVC112ADT![]()  | SN74LVC112ANSR![]()  | SN74LVC112APW![]()  | SN74LVC112APWE4![]()  | SN74LVC112APWLE![]()  | SN74LVC112APWR![]()  | SN74LVC112APWRE4![]()  | SN74LVC112APWRG4![]()  | SN74LVC112APWT![]()  | 
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Approx. Price (US$) | 0.21 | 1ku | 0.21 | 1ku | ||||||||||||||
| Bits | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | ||
| Bits(#) | 2 | 2 | ||||||||||||||
| F @ Nom Voltage(Max), Mhz | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | ||
| F @ Nom Voltage(Max)(Mhz) | 100 | 100 | ||||||||||||||
| ICC @ Nom Voltage(Max), mA | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | ||
| ICC @ Nom Voltage(Max)(mA) | 0.01 | 0.01 | ||||||||||||||
| Input Type | TTL/CMOS | TTL/CMOS | ||||||||||||||
| Output Drive (IOL/IOH)(Max), mA | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | -24/24 | ||
| Output Drive (IOL/IOH)(Max)(mA) | -24/24 | -24/24 | ||||||||||||||
| Output Type | TTL | TTL | ||||||||||||||
| Package Group | SOIC | SSOP | SSOP | SOIC | TVSOP | TVSOP | SOIC | SOIC | SO | TSSOP | TSSOP | TSSOP | TSSOP | TSSOP | TSSOP | TSSOP | 
| Package Size: mm2:W x L, PKG | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SSOP: 48 mm2: 7.8 x 6.2(SSOP) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16TVSOP: 23 mm2: 6.4 x 3.6(TVSOP) | 16TVSOP: 23 mm2: 6.4 x 3.6(TVSOP) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SOIC: 59 mm2: 6 x 9.9(SOIC) | 16SO: 80 mm2: 7.8 x 10.2(SO) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | ||
| Package Size: mm2:W x L (PKG) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 16TSSOP: 32 mm2: 6.4 x 5(TSSOP) | ||||||||||||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | 
| Schmitt Trigger | No | No | No | No | No | No | No | No | No | No | No | No | No | No | No | No | 
| Technology Family | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | LVC | 
| VCC(Max), V | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | ||
| VCC(Max)(V) | 3.6 | 3.6 | ||||||||||||||
| VCC(Min), V | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | 2 | ||
| VCC(Min)(V) | 2 | 2 | ||||||||||||||
| Voltage(Nom), V | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | ||
| Voltage(Nom)(V) | 3.3 | 3.3 | ||||||||||||||
| tpd @ Nom Voltage(Max), ns | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | 4.8 | ||
| tpd @ Nom Voltage(Max)(ns) | 4.8 | 4.8 | 
生态计划
| SN74LVC112AD | SN74LVC112ADBLE | SN74LVC112ADBR | SN74LVC112ADG4 | SN74LVC112ADGVR | SN74LVC112ADGVRG4 | SN74LVC112ADR | SN74LVC112ADT | SN74LVC112ANSR | SN74LVC112APW | SN74LVC112APWE4 | SN74LVC112APWLE | SN74LVC112APWR | SN74LVC112APWRE4 | SN74LVC112APWRG4 | SN74LVC112APWT | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Not Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Not Compliant | Compliant | Compliant | Compliant | Compliant | 
| Pb Free | No | No | 
应用须知
- LVC Characterization InformationPDF, 114 Kb, 档案已发布: Dec 1, 1996
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices. - Use of the CMOS Unbuffered Inverter in Oscillator CircuitsPDF, 796 Kb, 档案已发布: Nov 6, 2003
CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly 
模型线
系列: SN74LVC112A (16)
制造商分类
- Semiconductors> Logic> Flip-Flop/Latch/Register> J-K Flip-Flop