Datasheet Texas Instruments SN65LVDS9637DGNRG4 — 数据表

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Documents SN55LVDS32, SN65LVDS32, SN65LVDS3486, SN65LVDS9637
SLLS262R – JULY 1997 – REVISED DECEMBER 2014 SNx5LVDS3xxxx High-Speed Differential Line Receivers
1 Features 3 Description The SN55LVDS32, SN65LVDS32, SN65LVDS3486,
and SN65LVDS9637 devices are differential line
receivers that implement the electrical characteristics
of low-voltage differential signaling (LVDS). This
signaling technique lowers the output voltage levels
of 5-V differential standard levels (such as EIA/TIA422B) to reduce the power, increase the switching
speeds, and allow operation with a 3.3-V supply rail.
Any of the differential receivers provides a valid
logical output state with a В±100-mV differential input
voltage within the input common-mode voltage range.
The input common-mode voltage range allows 1 V of
ground potential difference between two LVDS
nodes. 1 Meet or Exceed the Requirements of ANSI
TIA/EIA-644 Standard
Operate With a Single 3.3-V Supply
Designed for Signaling Rates of up to 150 Mbps …