Datasheet Texas Instruments OPA699 — 数据表

制造商Texas Instruments
系列OPA699
Datasheet Texas Instruments OPA699

OPA699:宽带,高增益限压放大器

数据表

Wideband, High Gain Voltage Limiting Amplifier datasheet
PDF, 1.0 Mb, 修订版: D, 档案已发布: Dec 30, 2008
从文件中提取

价格

状态

OPA699IDOPA699IDG4OPA699IDR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesNo

打包

OPA699IDOPA699IDG4OPA699IDR
N123
Pin888
Package TypeDDD
Industry STD TermSOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY75752500
CarrierTUBETUBELARGE T&R
Device MarkingOPA699OPA
Width (mm)3.913.913.91
Length (mm)4.94.94.9
Thickness (mm)1.581.581.58
Pitch (mm)1.271.271.27
Max Height (mm)1.751.751.75
Mechanical Data下载下载下载

参数化

Parameters / ModelsOPA699ID
OPA699ID
OPA699IDG4
OPA699IDG4
OPA699IDR
OPA699IDR
2nd Harmonic, dBc676767
3rd Harmonic, dBc878787
@ MHz555
Acl, min spec gain, V/V444
Additional FeaturesN/AN/AN/A
ArchitectureVoltage FBVoltage FBVoltage FB
BW @ Acl, MHz260260260
CMRR(Min), dB555555
CMRR(Typ), dB616161
GBW(Typ), MHz100010001000
Input Bias Current(Max), pA100000001000000010000000
Iq per channel(Max), mA15.915.915.9
Iq per channel(Typ), mA15.515.515.5
Number of Channels111
Offset Drift(Typ), uV/C151515
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Output Current(Typ), mA120120120
Package GroupSOICSOICSOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)
Rail-to-RailNoNoNo
RatingCatalogCatalogCatalog
Slew Rate(Typ), V/us140014001400
Total Supply Voltage(Max), +5V=5, +/-5V=10121212
Total Supply Voltage(Min), +5V=5, +/-5V=10555
Vn at 1kHz(Typ), nV/rtHz131313
Vn at Flatband(Typ), nV/rtHz4.14.14.1
Vos (Offset Voltage @ 25C)(Max), mV555

生态计划

OPA699IDOPA699IDG4OPA699IDR
RoHSCompliantCompliantCompliant

应用须知

  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, 修订版: A, 档案已发布: May 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, 档案已发布: Apr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, 档案已发布: Jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

模型线

系列: OPA699 (3)

制造商分类

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)