Datasheet Texas Instruments OPA4684 — 数据表

制造商Texas Instruments
系列OPA4684
Datasheet Texas Instruments OPA4684

四路,低功耗,电流反馈运算放大器

数据表

Quad, Low-Power, Current-Feedback Operational Amplifier datasheet
PDF, 1.1 Mb, 修订版: G, 档案已发布: Jul 2, 2008
从文件中提取

价格

状态

OPA4684IDOPA4684IDG4OPA4684IDROPA4684IPWT
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNo

打包

OPA4684IDOPA4684IDG4OPA4684IDROPA4684IPWT
N1234
Pin14141414
Package TypeDDDPW
Industry STD TermSOICSOICSOICTSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY50502500250
CarrierTUBETUBELARGE T&RSMALL T&R
Device MarkingOPA4684OPA4684OPA46844684
Width (mm)3.913.913.914.4
Length (mm)8.658.658.655
Thickness (mm)1.581.581.581
Pitch (mm)1.271.271.27.65
Max Height (mm)1.751.751.751.2
Mechanical Data下载下载下载下载

参数化

Parameters / ModelsOPA4684ID
OPA4684ID
OPA4684IDG4
OPA4684IDG4
OPA4684IDR
OPA4684IDR
OPA4684IPWT
OPA4684IPWT
2nd Harmonic, dBc67676767
3rd Harmonic, dBc70707070
@ MHz5555
Acl, min spec gain, V/V1111
Additional FeaturesShutdownShutdownShutdownShutdown
ArchitectureBipolar,Current FBBipolar,Current FBBipolar,Current FBBipolar,Current FB
BW @ Acl, MHz210210210210
CMRR(Min), dB53535353
CMRR(Typ), dB60606060
GBW(Typ), MHz210210210210
Input Bias Current(Max), pA10000000100000001000000010000000
Iq per channel(Max), mA1.81.81.81.8
Iq per channel(Typ), mA1.71.71.71.7
Number of Channels4444
Offset Drift(Typ), uV/C12121212
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Output Current(Typ), mA120120120120
Package GroupSOICSOICSOICTSSOP
Package Size: mm2:W x L, PKG14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14SOIC: 52 mm2: 6 x 8.65(SOIC)14TSSOP: 32 mm2: 6.4 x 5(TSSOP)
Rail-to-RailNoNoNoNo
RatingCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us820820820820
Total Supply Voltage(Max), +5V=5, +/-5V=1012121212
Total Supply Voltage(Min), +5V=5, +/-5V=105555
Vn at 1kHz(Typ), nV/rtHz3.73.73.73.7
Vn at Flatband(Typ), nV/rtHz3.73.73.73.7
Vos (Offset Voltage @ 25C)(Max), mV3.53.53.53.5

生态计划

OPA4684IDOPA4684IDG4OPA4684IDROPA4684IPWT
RoHSCompliantCompliantCompliantCompliant

应用须知

  • Current Feedback Amplifiers: Review, Stability Analysis, and Applications
    PDF, 53 Kb, 档案已发布: Nov 20, 2000
    The majority of op amp circuits are closed-loop feedback systems that implement classical control theory analysis. Analog designers are comfortable with Voltage FeedBack (VFB) op amps in a closed-loop system and are familiar with the ideal op amp approximations feedback permit. This application bulletin will demonstrate how CFB op amps can be analyzed in a similar fashion. Once the closed-loop sim
  • Stabilizing Current-Feedback Op Amps While Optimizing Circuit Performance
    PDF, 280 Kb, 档案已发布: Apr 28, 2004
    Optimizing a circuit design with a current-feedback (CFB) op amp is a relatively straightforward task, once one understands how CFB op amps achieve stability. This application note explains a 2nd-order CFB model so that any designer can better understand the flexibility of the CFB op amp. This report also discusses stability analysis, the effects of parasitic components due to PCBs, optimization
  • Active filters using current-feedback amplifiers
    PDF, 227 Kb, 档案已发布: Feb 25, 2005
  • Expanding the usability of current-feedback amplifiers
    PDF, 215 Kb, 档案已发布: Feb 28, 2005
  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, 修订版: A, 档案已发布: May 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, 档案已发布: Apr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, 档案已发布: Jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, 修订版: A, 档案已发布: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

模型线

制造商分类

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)