Datasheet Texas Instruments CD74HC390 — 数据表

制造商Texas Instruments
系列CD74HC390
Datasheet Texas Instruments CD74HC390

高速CMOS逻辑双十年纹波计数器

数据表

CD74HC390, CD54HCT390, CD74HCT390 datasheet
PDF, 456 Kb, 修订版: C, 档案已发布: Oct 16, 2003
从文件中提取

价格

状态

CD74HC390ECD74HC390EE4CD74HC390MCD74HC390M96CD74HC390M96E4CD74HC390M96G4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNo

打包

CD74HC390ECD74HC390EE4CD74HC390MCD74HC390M96CD74HC390M96E4CD74HC390M96G4
N123456
Pin161616161616
Package TypeNNDDDD
Industry STD TermPDIPPDIPSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY252540250025002500
CarrierTUBETUBETUBELARGE T&RLARGE T&RLARGE T&R
Device MarkingCD74HC390ECD74HC390EHC390MHC390MHC390MHC390M
Width (mm)6.356.353.913.913.913.91
Length (mm)19.319.39.99.99.99.9
Thickness (mm)3.93.91.581.581.581.58
Pitch (mm)2.542.541.271.271.271.27
Max Height (mm)5.085.081.751.751.751.75
Mechanical Data下载下载下载下载下载下载

参数化

Parameters / ModelsCD74HC390E
CD74HC390E
CD74HC390EE4
CD74HC390EE4
CD74HC390M
CD74HC390M
CD74HC390M96
CD74HC390M96
CD74HC390M96E4
CD74HC390M96E4
CD74HC390M96G4
CD74HC390M96G4
Bits444444
F @ Nom Voltage(Max), Mhz282828282828
FunctionCounterCounterCounterCounterCounterCounter
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.08
IOH(Max), mA-5.2-5.2-5.2-5.2-5.2-5.2
IOL(Max), mA5.25.25.25.25.25.2
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Package GroupPDIPPDIPSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)16SOIC: 59 mm2: 6 x 9.9(SOIC)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Technology FamilyHCHCHCHCHCHC
TypeDecadeDecadeDecadeDecadeDecadeDecade
VCC(Max), V666666
VCC(Min), V222222
Voltage(Nom), V3.3,53.3,53.3,53.3,53.3,53.3,5
tpd @ Nom Voltage(Max), ns525252525252

生态计划

CD74HC390ECD74HC390EE4CD74HC390MCD74HC390M96CD74HC390M96E4CD74HC390M96G4
RoHSCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

应用须知

  • SN54/74HCT CMOS Logic Family Applications and Restrictions
    PDF, 102 Kb, 档案已发布: May 1, 1996
    The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
  • Selecting the Right Texas Instruments Signal Switch
    PDF, 769 Kb, 档案已发布: Sep 7, 2001
    Texas Instruments offers a wide variety of electronic switches (digital analog bilateral bilateral analog) in a variety of families including CBT CBTLV HC LV and LVC. Depending on the application the right solution may be an analog switch that passes digital signals or vice versa. This application report summarizes the various switching technologies and provides considerations for choosi
  • Live Insertion
    PDF, 150 Kb, 档案已发布: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, 档案已发布: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, 档案已发布: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, 修订版: D, 档案已发布: Jun 23, 2016
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, 修订版: C, 档案已发布: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, 修订版: B, 档案已发布: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Semiconductor Packing Material Electrostatic Discharge (ESD) Protection
    PDF, 337 Kb, 档案已发布: Jul 8, 2004
    Forty-eight-pin TSSOP components that were packaged using Texas Instruments (TI) standard packing methodology were subjected to electrical discharges between 0.5 and 20 kV as generated by an IEC ESD simulator to determine the level of ISD protection provided by the packing materials. The testing included trays tape and reel and magazines. Additional units were subjected to the same discharge
  • Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)
    PDF, 614 Kb, 修订版: C, 档案已发布: Dec 2, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, 档案已发布: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
  • Introduction to Logic
    PDF, 93 Kb, 档案已发布: Apr 30, 2015

模型线

制造商分类

  • Semiconductors > Logic > Specialty Logic > Counter/Arithmetic/Parity Function