Datasheet Texas Instruments CD74AC138 — 数据表

制造商	Texas Instruments
系列	CD74AC138

3线至8线反相解码器/解复用器

数据表

PDF, 916 Kb, 修订版: A, 档案已发布: Feb 21, 2003

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	CD74AC138E	CD74AC138EE4	CD74AC138M	CD74AC138M96	CD74AC138M96E4	CD74AC138M96G4	CD74AC138ME4
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No	No	No

	CD74AC138E	CD74AC138EE4	CD74AC138M	CD74AC138M96	CD74AC138M96E4	CD74AC138M96G4	CD74AC138ME4
N	1	2	3	4	5	6	7
Pin	16	16	16	16	16	16	16
Package Type	N	N	D	D	D	D	D
Industry STD Term	PDIP	PDIP	SOIC	SOIC	SOIC	SOIC	SOIC
JEDEC Code	R-PDIP-T	R-PDIP-T	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Package QTY	25	25	40	2500	2500	2500	40
Carrier	TUBE	TUBE	TUBE	LARGE T&R	LARGE T&R	LARGE T&R	TUBE
Device Marking	CD74AC138E	CD74AC138E	AC138M	AC138M	AC138M	AC138M	AC138M
Width (mm)	6.35	6.35	3.91	3.91	3.91	3.91	3.91
Length (mm)	19.3	19.3	9.9	9.9	9.9	9.9	9.9
Thickness (mm)	3.9	3.9	1.58	1.58	1.58	1.58	1.58
Pitch (mm)	2.54	2.54	1.27	1.27	1.27	1.27	1.27
Max Height (mm)	5.08	5.08	1.75	1.75	1.75	1.75	1.75
Mechanical Data	下载	下载	下载	下载	下载	下载	下载

Parameters / Models	CD74AC138E	CD74AC138EE4	CD74AC138M	CD74AC138M96	CD74AC138M96E4	CD74AC138M96G4	CD74AC138ME4
Bandwidth, MHz	100	100	100	100	100	100	100
Bits	8	8	8	8	8	8	8
Number of Channels	1	1	1	1	1	1	1
Configuration	3:8	3:8	3:8	3:8	3:8	3:8	3:8
Digital input leakage(Max), uA	5	5	5	5	5	5	5
ESD Charged Device Model, kV	0.75	0.75	0.75	0.75	0.75	0.75	0.75
ESD HBM, kV	2	2	2	2	2	2	2
F @ Nom Voltage(Max), Mhz	100	100	100	100	100	100	100
Function	Decoder/Demultiplexer	Decoder/Demultiplexer	Decoder/Demultiplexer	Decoder/Demultiplexer	Decoder/Demultiplexer	Decoder/Demultiplexer	Decoder/Demultiplexer
ICC @ Nom Voltage(Max), mA	0.08	0.08	0.08	0.08	0.08	0.08	0.08
Operating Temperature Range, C	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125	-55 to 125
Output Drive (IOL/IOH)(Max), mA	24/-24	24/-24	24/-24	24/-24	24/-24	24/-24	24/-24
Package Group	PDIP	PDIP	SOIC	SOIC	SOIC	SOIC	SOIC
Package Size: mm2:W x L, PKG	See datasheet (PDIP)	See datasheet (PDIP)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)	16SOIC: 59 mm2: 6 x 9.9(SOIC)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No	No	No
Technology Family	AC	AC	AC	AC	AC	AC	AC
Type	Standard	Standard	Standard	Standard	Standard	Standard	Standard
VCC(Max), V	5.5	5.5	5.5	5.5	5.5	5.5	5.5
VCC(Min), V	1.5	1.5	1.5	1.5	1.5	1.5	1.5
Voltage(Nom), V	1.5, 3.3,5	1.5, 3.3,5	1.5, 3.3,5	1.5, 3.3,5	1.5, 3.3,5	1.5, 3.3,5	1.5, 3.3,5
tpd @ Nom Voltage(Max), ns	138,15.4,11	138,15.4,11	138,15.4,11	138,15.4,11	138,15.4,11	138,15.4,11	138,15.4,11

	CD74AC138E	CD74AC138EE4	CD74AC138M	CD74AC138M96	CD74AC138M96E4	CD74AC138M96G4	CD74AC138ME4
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant
Pb Free	Yes	Yes

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Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
PDF, 43 Kb, 档案已发布: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

系列: CD74AC138 (7)